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PI7VD9004ABH Datasheet(PDF) 26 Page - Pericom Semiconductor Corporation |
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PI7VD9004ABH Datasheet(HTML) 26 Page - Pericom Semiconductor Corporation |
26 / 53 page ![]() PI7VD9004ABH Adaptive EQ 4-channel 960H Video Decoder Pericom Semiconductor Corporation 26 www.pericom.com 6.1.30 RESERVED REGISTER – OFFSET 66-6FH 6.1.31 AUDIO CLOCK CONTROL REGISTER – OFFSET 70H(Default=08H) BIT FUNCTION TYPE DESCRIPTION [2:0] AFMD RW 0: 8KHz 1: 16KHz 2: 32KHz 3: 44.1KHz 4: 48KHz [3] Reserved R Reset to 1b [5:4] Reserved R Reset to 0b [6] S2I_8BIT RW 0:SCLK_P/LRCK_P/SDOUT_P pin input 16-bit control 1: SCLK_P/LRCK_P/SDOUT_P pin input 8-bit control [7] Reserved R Reset to 0b 6.1.32 I2S AUDIO INPUT CONTROL REGISTER – OFFSET 71H(Default=00H) BIT FUNCTION TYPE DESCRIPTION [1:0] Reserved R Reset to 00b [2] SDINPDLY RW SDIN_P input data delay by one SCLK_P clock 0:No delay; 1T delay for I2S interface 1:Add 1 SCLK_P clock delay in SDIN_P input.; 0T delay for left-justified interface. [7:3] Reserved R Reset to 00h 6.1.33 RESERVED REGISTER – OFFSET72H-7AH 6.1.34 SDOUT_M SELECT (R) REGISTER – OFFSET 7BH(Default=00H) BIT FUNCTION TYPE DESCRIPTION [1:0] Reserved R Reset to 00b [4:0] I2SO_RSEL RW Select R channel output on SDOUT_M pin when SDOUTM_I2SOEN=1 0:Select record audio channel LINE_IN0_1 1:Select record audio channel LINE_IN1_1 2:Select record audio channel LINE_IN2_1 3:Select record audio channel LINE_IN3_1 4:Select record audio channel LINE_IN0_2 5:Select record audio channel LINE_IN1_2 6:Select record audio channelLINE_IN2_2 7:Select record audio channel LINE_IN3_2 8:Select record audio channel LINE_IN0_3 9:Select record audio channel LINE_IN1_3 A:Select record audio channel LINE_IN2_3 B:Select record audio channel LINE_IN3_3 C:Select record audio channel LINE_IN0_4 D:Select record audio channel LINE_IN1_4 E:Select record audio channel LINE_IN2_4 F:Select record audio channel LINE_IN3_4 10h:Select playback audio of the master chip 13-0174 |
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