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PI7VD9004ABH Datasheet(PDF) 11 Page - Pericom Semiconductor Corporation |
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PI7VD9004ABH Datasheet(HTML) 11 Page - Pericom Semiconductor Corporation |
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11 / 53 page  PI7VD9004ABH Adaptive EQ 4-channel 960H Video Decoder Pericom Semiconductor Corporation 11 www.pericom.com 4 Functional Description 4.1 Video/Audio Analog Input PI7VD9004ABH offers4 channels NTSC, PAL (720H or 960H) format composite (CVBS) inputs(CV_INAx and CV_INBx, x= 0,1,2,3). When the input signal is weak and the color burst is not able to be recognized, the video is automatically switched to Black and White mode to enhance the picture image quality. Format Lines Field Fsc Country NTSC-M 525 60 3.579545 MHz U.S., many others NTSC-Japan 525 60 3.579545 MHz Japan * NTSC (4.43) 525 60 4.433619 MHz Transcoding PAL-B, G, N 625 50 4.433619 MHz Many PAL-I /H /D 625 50 4.433619 MHz Belgium ,China Great Britain, others PAL-M 525 60 3.575612 MHz Brazil PAL-CN 625 50 3.582056 MHz Argentina PAL-60 525 60 4.433619 MHz China * NTSC-Japan has 0 IRE setup 4.2 Clamping and Automatic Gain Control Each analog input channel has built-in clamping circuits to restore signal DC level. Automatic Gain Control (AGC) circuits in the internal video processor can compensate average input video signal level for each analog input channel. The AGC and clamping circuits prevent signal level saturation and allow the video decoder to deliver the best signal-to-noise performance. On the other hand, the AGC cooperates with the digital multiplier of video decoder to boost the weak signals. The circuits perform Automatic Gain Control through internal feedback look. Manual gain control is also available through configuring the Video Decoder Control and Status Registers 4.3 Video Decoder The video decoder in the chip converts NTSC and PAL video signals to 8-bit ITU-R BT.656 format. The chip includes four high speed and low power 10-bit analog-to-digital converters (ADC) with 2x sampling rate to support 4-channel video decoding. When the incoming video is in the 720H format, the sampling rate is 27MHz or 54MHz by 2x factor. For 960H format, the sampling rate is 36MHz or 72MHz by 2x factor. The chip implements proprietary circuit design that is optimized for locking in weak, noisy, or unstable signals. The minimal signal voltage that can be locked in is at 160/80 mV 4.4 Adaptive Equalization The CVBS is suffered from channel loss by an extended transmission distance (greater than 500m) and a small diameter (less than 0.5mm) of CCTV cable. The distortion on CVBS after the energy reduction effect of cable length is illustrated as below. For example, a Multi-Burst test signal is respectively measured at 0.5m and 500m of cable.It appears that color burst and sync tip have sever degration after 500m transmission distance. Adaptive equalization on the distorted CVBS recovers the signal back to close to the original level. Since the different cable conditions present various effects on CVBS picture image, the adaptive equalization provides to compensate the signal loss on some frequency components pertinent to the Coax cable. 13-0174 |
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