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PI7VD9004ABH Datasheet(PDF) 47 Page - Pericom Semiconductor Corporation

Part No. PI7VD9004ABH
Description  Adaptive EQ 4-channel 960H Video Decoder
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Maker  PERICOM [Pericom Semiconductor Corporation]
Homepage  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI7VD9004ABH Datasheet(HTML) 47 Page - Pericom Semiconductor Corporation

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PI7VD9004ABH
Adaptive EQ 4-channel 960H Video Decoder
Pericom Semiconductor Corporation  
47 
www.pericom.com     
 
limitations
due
to
the
source
impedance of 37.5 and loading on
the board, 30 pF (140 MHz).
7.4.1
Audio Electrical Characteristics
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
Zi
Input impedance
Analog video inputs by design
40
Ci
Input Capacitance
Analog video inputs by design
10
pF
Vi
Maximum Input Range
0.25
1.6
V
SNR
Signal to Noise Ratio
85
dB
DNR
Dynamic Range
80
dB
THD
Total Harmonic Distortion
-75
dB
7.4.2
Pixel Clock and Video Data Timing
Symbol
Parameter
Min
Typ
Max
Unit
TS1
Setup from PIXCLK_PO to PIXOUT (144MHz)
2.6
-
4.3
ns
TH1
Hold from PIXCLK_PO to PIXOUT (144MHz)
2.7
-
4.4
ns
TS2
Setup from PIXCLK_PO to PIXOUT (108MHz)
3.8
-
5.4
ns
TH2
Hold from PIXCLK_PO to PIXOUT (108MHz)
3.9
-
5.5
ns
TS3
Setup from PIXCLK_PO to PIXOUT (72MHz)
5.6
-
7.6
ns
TH3
Hold from PIXCLK_PO to PIXOUT (72MHz)
6.3
-
8.3
ns
TS4
Setup from PIXCLK_PO to PIXOUT (54MHz)
8.2
-
10.3
ns
TH4
Hold from PIXCLK_PO to PIXOUT (54MHz)
8.3
-
10.4
ns
TS5
Setup from PIXCLK_PO to PIXOUT (36MHz)
14.1
-
16.1
ns
TH5
Hold from PIXCLK_PO to PIXOUT (36MHz)
11.7
-
13.7
ns
TS6
Setup from PIXCLK_PO to PIXOUT (27MHz)
19
-
20.9
ns
TH6
Hold from PIXCLK_PO to PIXOUT (27MHz)
16.1
18
ns
The timing value is measured by the following conditions: (1) the clock delay control on PIXCLK_PO pin is set to zero; (2)
the clock polarity control on PIXCLK_PO pin is not inverted.
13-0174


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