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CGS2535V Datasheet(PDF) 5 Page - National Semiconductor (TI) |
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CGS2535V Datasheet(HTML) 5 Page - National Semiconductor (TI) |
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5 / 8 page 
CGS2534/35/36/37 Memory Array Driving In order to minimize the total load on the address bus, quite often memory arrays are driven by buffers while having the inputs of the buffers tied together. Although this practice was feasible in the conventional memory designs, in today’s high speed, large buswidth designs which require address fetch- ing at higher speeds, this technique produces many undes- ired results such as cross-talk and over/undershoot. CGS2534/35/36/37 Quad 1 to 4 clock drivers were designed specifically to address these application issues on high speed, large memory arrays systems. These drivers are optimized to drive large loads, with 3.5 ns propagation delays. These drivers produce less noise while reducing the total capacitive loading on the address bus by having only four inputs tied together (see the diagram below, point A). This helps to minimize the overshoot and under- shoot by having only four outputs being switched simulta- neously. Also this larger fan-out helps to save board space since for every one of these drivers, two conventional buffers were typically being used. Another feature associated with these clock drivers is a 350 ps pin-to-pin skew specification. The minimum skew specification allows high speed memory system designers to optimize the performance of their memory sub-system by operating at higher frequencies without having concerns about output-to-output (bank-to-bank) synchronization prob- lems which are associated with driving high capacitive loads (Point B). The diagram below depicts a “2534/35/36/37” a memory subsystem operating at high speed with large memory ca- pacity. The address bus is common to both the memory and the CPU and I/Os. These drivers can operate beyond 125 MHz, and are also available in 3V–5V TTL/CMOS versions with large current drive . Device V CC I/O Output Configuration 2534 5 TTL Inverting quad 1–4 2535 3 or 5 CMOS Non-inverting quad 1–4 2536 3 or 5 CMOS Inverting, Non-inverting, ÷2 2537 5 TTL Inverting quad 1–4 with series 8 Ω output resistors DS011954-8 5 http:\\www.national.com |
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