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HMC6545 Datasheet(PDF) 14 Page - Analog Devices |
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HMC6545 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 23 page  HMC6545 Data Sheet Rev. A | Page 14 of 23 Read Cycle In a read cycle, the master reads from the slave immediately after the first byte. The direction of data transfer changes between master and slave (see Figure 32). In this case, the R/W bit is set to 1 to indicate that the master reads data from the slave device. The address of the internal register from which the data is to come has been previously set in a precedent write cycle; otherwise, the slave device defaults to Address 0x00. This time, the slave device transmits all the data bytes and the master replies with an acknowledge bit. For the last byte read, the master replies with a no acknowledge bit to indicate to the slave that it must stop transmitting data. The master then generates a stop condition, and the cycle ends. 2-Wire Interface Design Considerations The HMC6545 2-wire interface slave interface responds to any register address or data matching its chip address even when there is no preceding start condition. A 2-wire interface communication is defined as shown in Figure 30. Figure 30. 2-Wire Interface Communication Coincidentally, the data or register address can be the same as the chip address of another device on the same bus. However, that other device does not respond because there is no preceding start condition. In the HMC6545, regardless of whether there is a start condition, if the HMC6545 sees a bit stream that corresponds to its chip address, it then responds and causes unwanted results. There must be only one HMC6545 device on the 2-wire interface bus; otherwise, 2-wire interface bus multiplexers can be used to isolate the HMC6545 devices. See Figure 33 for an example design. Reset A low strobe signal must be sent to the RST pin to reset the registers to their default values. SDA and SCL must be high in the 2-wire interface bus before and after the rising edge. Figure 31. Reset Registers Figure 32. Read Cycle Figure 33. Multiple HMC6545 Devices on 2-Wire Interface Bus START CHIP ADDRESS + WRITE ADDRESS BYTE DATA BYTE STOP START CHIP ADDRESS + READ DATA BYTE STOP SDA SCL RST 0.5µs 0.5µs 1.0µs START R/W = 1 ACK ACK STOP NACK DATA BYTE ACK DATA BYTE DATA BYTE SLAVE ADDRESS FROM MASTER TO SLAVE FROM SLAVE TO MASTER MASTER HMC6545 HMC6545 2-WIRE INTERFACE BUS DEMUX CONTROL OTHER VENDOR SLAVE1 OTHER VENDOR SLAVE2 2-WIRE INTERFACE BUS 2-WIRE INTERFACE BUS |
Similar Part No. - HMC6545 |
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Similar Description - HMC6545 |
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