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EVAL-ADM1260EBZ Datasheet(PDF) 36 Page - Analog Devices |
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EVAL-ADM1260EBZ Datasheet(HTML) 36 Page - Analog Devices |
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36 / 71 page  ADM1260 Data Sheet Rev. 0 | Page 36 of 71 Block Read In a block read operation, the master device reads a block of data from a slave device. The start address for a block read must be set previously. In the ADM1260, this is achieved by a send byte operation to set a RAM address, or a write byte/word operation to set an EEPROM address. The block read operation itself consists of a send byte operation that sends a block read command to the slave, immediately followed by a repeated start and a read operation that reads out multiple data bytes, as follows: 1. The master device asserts a start condition on SDA. 2. The master sends the 7-bit slave address followed by the write bit (low). 3. The addressed slave device asserts an acknowledge on SDA. 4. The master sends a command code that tells the slave device to expect a block read. The ADM1260 command code for a block read is 0xFD (1111 1101). 5. The slave asserts an acknowledge on SDA. 6. The master asserts a repeat start condition on SDA. 7. The master sends the 7-bit slave address followed by the read bit (high). 8. The slave asserts an acknowledge on SDA. 9. The ADM1260 sends a byte count data byte that tells the master how many data bytes to expect. The ADM1260 always returns 32 data bytes (0x20), which is the maximum allowed by the SMBus Version 1.1 specification. 10. The master asserts an acknowledge on SDA. 11. The master receives 32 data bytes. 12. The master asserts an acknowledge on SDA after each data byte and a no acknowledge is generated after the last byte to signal the end of the read. 13. The master asserts a stop condition on SDA to end the transaction. Error Correction The ADM1260 provides the option of issuing a packet error correction (PEC) byte after a write to the RAM, a write to the EEPROM, a block write to the RAM/EEPROM, or a block read from the RAM/EEPROM. This option enables the user to verify that the data received by or sent from the ADM1260 is correct. The PEC byte is an optional byte sent after the last data byte is written to or read from the ADM1260. The protocol is the same as a block read for Step 1 to Step 12 and then proceeds as follows: 1. The ADM1260 issues a PEC byte to the master. The master checks the PEC byte and issues another block read, if the PEC byte is incorrect. 2. A no acknowledge is generated after the PEC byte to signal the end of the read. 3. The master asserts a stop condition on SDA to end the transaction. Note that the PEC byte is calculated using CRC-8. The frame check sequence (FCS) conforms to CRC-8 by the polynomial C(x) = x8 + x2 + x1 + 1 See the SMBus Version 1.1 specification for details. An example of a block read with the optional PEC byte is shown in Figure 49. SLAVE ADDRESS SW A 2 COMMAND 0xFD (BLOCK READ) 4 13 A 5 S 6 SLAVE ADDRESS 7 BYTE COUNT 910 11 A RA 8 DATA 1 DATA 32 12 A 13 P A Figure 48. Block Read from the EEPROM or RAM SLAVE ADDRESS SW A 2 COMMAND 0xFD (BLOCK READ) 4 13 A 5 S 6 SLAVE ADDRESS 7 BYTE COUNT 910 12 11 A RA 8 DATA 1 DATA 32 A 13 PEC 14 A 15 P A Figure 49. Block Read from the EEPROM or RAM with PEC |
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