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2013-11-0003

PT0236-6

11/18/13

6

PT7M6832-6840

Ultra Low Voltage Detectors

Functional Description

Reset Output

The PT7M6832–PT7M6840 assert a reset to prevent code-

execution errors during power-up, power-down, or brownout

conditions. They also assert a reset signal whenever the Vcc

supply voltage falls below a preset threshold (PT7M6832–

PT7M6837) or RESET-IN falls below the adjustable threshold

(PT7M6838-PT7M6840), keeping reset asserted for a fixed

timeout delay (Table 2) after Vcc or RESET-IN has risen

above the reset threshold. The PT7M6832/6835/6838 use a

push-pull active-low output, the PT7M6833/6836/6839 have a

push-pull active-high output, and the PT7M6834/6837/ 6840

have an open-drain active- low output stage. Connect a pull-

up resistor on the PT7M6834/6837/ 6840’s RESET output to

any supply between 0 and 6V.

Manual Reset Input

Reset remains asserted while MR is low, and for a fixed

timeout delay after MR returns high. This input has an

internal 20kΩ pull-up resistor, so it can be left open if it is not

used. MR can be driven with CMOS logic level, or with open-

drain/collector outputs. To create a manual reset function,

connect a normally open momentary switch from MR to

ground; external debounce circuitry is not required.

RESET-IN

The PT7M6838/6839/6840 features a RESET-IN input for

monitoring supply voltages down to 0.44V. An external

resistive-divider

network

can

be

used

to

set

voltage

monitoring thresholds as shown in Fig.3. As the monitored

voltage falls, the voltage at RESET-IN decreases and asserts a

The low-leakage current at RESET-IN allows for relatively

large-value resistors to be used, which reduce power

consumption. For example, for a 0.6V monitored trip level, if

R2 = 200kΩ, then R1 = 70.3kΩ.

Note: The minimum Vcc of 1.3V is required to guarantee the

RESET-IN threshold accuracy.

RESET

(RESET)

RESET-IN

PT7M6838

/6839

/6840

() is for PT7M6839

Fig.3 External setting of adjustable threshold