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IS42VS16400E-75TL Datasheet(PDF) 4 Page - Integrated Silicon Solution, Inc

Part # IS42VS16400E-75TL
Description  Random column address every clock cycle
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS42VS16400E-75TL Datasheet(HTML) 4 Page - Integrated Silicon Solution, Inc

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IS42VS16400E
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. A
05/15/09
PIN FUNCTIONS
Symbol
Pin No.
Type
Function (In Detail)
A0-A11
23to26
InputPin
AddressInputs:A0-A11aresampledduringtheACTIVE
29to34
command(row-addressA0-A11)andREAD/WRITEcommand(A0-A7
22,35
withA10definingautoprecharge)toselectonelocationoutofthememoryarray
intherespectivebank.A10issampledduringaPRECHARGEcommandtodeter-
mineifallbanksaretobeprecharged(A10HIGH)orbankselectedby
BA0,BA1(LOW).Theaddressinputsalsoprovidetheop-codeduringaLOAD
MODEREGISTERcommand.
BA0,BA1
20,21
InputPin
BankSelectAddress:BA0andBA1defineswhichbanktheACTIVE,READ,WRITE
orPRECHARGEcommandisbeingapplied.Thesepinsalsoselectbetweenthe
moderegisterandtheextendedmoderegister.
CAS
17
InputPin
CAS
, in conjunction with the RAS and WE, forms the device command. See the
"Command Truth Table" for details on device commands.
CKE
37
InputPin
TheCKEinputdetermineswhethertheCLKinputisenabled.Thenextrisingedge
oftheCLKsignalwillbevalidwhenisCKEHIGHandinvalidwhenLOW.WhenCKE
isLOW,thedevicewillbeineitherpower-downmode,clocksuspendmode,orself
refresh mode. CKEisan asynchronous input.
CLK
38
InputPin
CLKisthemasterclockinputforthisdevice.ExceptforCKE,allinputstothisdevice
areacquiredinsynchronizationwiththerisingedgeofthispin.
CS
19
InputPin
The CS input determines whether command input is enabled within the device.
Command input is enabled when CSisLOW,anddisabledwithCSisHIGH.The
device remains in the previous state when CSisHIGH.
DQ0to
2,4,5,7,8,10,
DQPin
DQ0toDQ15areI/Opins.I/Othroughthesepinscanbecontrolledinbyteunits
DQ15
11,13,42,44,45,
usingtheLDQMandUDQMpins.
47,48,50,51,53
LDQM,
15,39
InputPin
LDQMandUDQMcontrolthelowerandupperbytesoftheI/Obuffers.Inread
UDQM
mode,LDQMandUDQMcontroltheoutputbuffer.WhenLDQMorUDQMisLOW,
thecorrespondingbufferbyteisenabled,andwhenHIGH,disabled.Theoutputs
gototheHIGHimpedancestatewhenLDQM/UDQMisHIGH.Thisfunctioncor-
responds to OEinconventionalDRAMs.Inwritemode,LDQMandUDQMcontrol
theinputbuffer.WhenLDQMorUDQMisLOW,thecorrespondingbufferbyteisen-
abled,anddatacanbewrittentothedevice.WhenLDQMorUDQMisHIGH,input
data is masked and cannot be written to the device.
RAS
18
InputPin
RAS
, in conjunction with CAS and WE, forms the device command. See the "Com-
mand Truth Table" item for details on device commands.
WE
16
InputPin
WE
, in conjunction with RAS and CAS, forms the device command. See the "Com-
mand Truth Table" item for details on device commands.
VDDq
3,9,43,49
PowerSupplyPinVDDq is the output buffer power supply.
VDD
1,14,27
PowerSupplyPinVDD is the device internal power supply.
GNDq
6,12,46,52
PowerSupplyPinGNDq is the output buffer ground.
GND
28,41,54
PowerSupplyPinGND is the device internal ground.


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