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IS42S86400F Datasheet(PDF) 53 Page - Integrated Silicon Solution, Inc |
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IS42S86400F Datasheet(HTML) 53 Page - Integrated Silicon Solution, Inc |
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53 / 68 page  Integrated Silicon Solution, Inc. — www.issi.com 53 Rev. 00A 11/5/2013 IS42/45R86400F/16320F/32160F, IS42/45S86400F/16320F/32160F DON'T CARE CLK COMMAND BANK n BANK m ADDRESS DQ T0 T1 T2 T3 T4 T5 T6 T7 NOP NOP NOP NOP NOP NOP DIN a DIN a+1 DOUT b DOUT b+1 BANK n, COL a BANK m, COL b CAS Latency - 3 (BANK m) tRP - BANK n tRP -BANKm WRITE - AP BANK n READ - AP BANK m Page Active WRITE with Burst of 4 Interrupt Burst, Write-Back Precharge Page Active READ with Burst of 4 Precharge Internal States tDPL - BANK n DON'T CARE CLK COMMAND BANK n BANK m ADDRESS DQ T0 T1 T2 T3 T4 T5 T6 T7 NOP NOP NOP NOP NOP NOP BANK n, COL a BANK m, COL b tRP - BANK n tDPL -BANKm WRITE - AP BANK n WRITE - AP BANK m Page Active WRITE with Burst of 4 Interrupt Burst, Write-Back Precharge Page Active WRITE with Burst of 4 Write-Back Internal States tDPL - BANK n DIN a DIN a+1 DIN a+2 DIN b DIN b+1 DIN b+2 DIN b+3 WRITE with Auto Precharge 3. Interrupted by a READ (with or without auto precharge): AREADtobankmwillinterruptaWRITEonbanknwhen registered, with the data-out appearing (CAS latency) later.ThePRECHARGEtobanknwillbeginaftertdpl is met, where tdpl begins when the READ to bank m is registered.ThelastvalidWRITE to bank n will be data-in registered one clock prior to the READ to bank m. 4.InterruptedbyaWRITE(withorwithoutautoprecharge): AWRITE to bank m will interrupt a WRITE on bank n when registered.ThePRECHARGEtobanknwillbeginafter tdpl is met, where tdplbeginswhentheWRITEtobank misregistered.ThelastvaliddataWRITEtobankn willbedataregisteredoneclockpriortoaWRITEto bank m. WRITE With Auto Precharge interrupted by a READ WRITE With Auto Precharge interrupted by a WRITE |
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