IS25WD020-JKLE datasheet(9/35 Pages) ISSI

Part #	IS25WD020-JKLE

Description	2 Mbit / 4 Mbit Single Operating Voltage Serial Flash Memory

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Manufacturer	ISSI [Integrated Silicon Solution, Inc]

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IS25WD020/040

Integrated Silicon Solution, Inc.- www.issi.com

Rev. F

07/31/2013

9

REGISTERS (CONTINUED)

PROTECTION MODE

The IS25WD020/040 have two types of write-

protection mechanisms: hardware and software.

These are used to prevent irrelevant operation in a

possibly noisy environment and protect the data

integrity.

HARDWARE WRITE-PROTECTION

The devices provide two hardware write-protection

features:

a. When inputting a program, erase or write status

register instruction, the number of clock pulse is

checked to determine whether it is a multiple of eight

before the executing. Any incomplete instruction

command sequence will be ignored.

0.

The Write Protection (WP#) pin provides a

hardware write protection method for BP2, BP1,

BP0 and SRWD in the Status Register. Refer to

the STATUS REGISTER description.

c.

Write inhibit is 1.5 V, all write sequence will be

ignored when Vcc drop to 1.5 V and lower

SOFTWARE WRITE PROTECTION

The IS25WD020/040 also provides two software write

protection features:

a. Before the execution of any program, erase or write

status register instruction, the Write Enable Latch

(WEL) bit must be enabled by executing a Write

Enable (WREN) instruction. If the WEL bit is not

enabled first, the program, erase or write register

instruction will be ignored.

b. The Block Protection (BP2, BP1, BP0) bits allow part

or the whole memory area to be write-protected.

Table 9. Hardware Write Protection on Status

Register

SRWD

WP#

Status Register

0

Low

Writable

1

Low

Protected

0

High

Writable

1

High

Writable

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IS25WD020-JKLE Datasheet(PDF) 9 Page - Integrated Silicon Solution, Inc

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