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IS25WD020-JNLE Datasheet(PDF) 8 Page - Integrated Silicon Solution, Inc |
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IS25WD020-JNLE Datasheet(HTML) 8 Page - Integrated Silicon Solution, Inc |
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8 / 35 page  IS25WD020/040 Integrated Silicon Solution, Inc.- www.issi.com Rev. F 07/31/2013 8 REGISTERS (CONTINUED) Table 6. Status Register Bit Definition Bit Name Definition Read- /Write Non-Volatile bit Bit 0 WIP Write In Progress Bit: “0” indicates the device is ready “1” indicates a write cycle is in progress and the device is busy R No Bit 1 WEL Write Enable Latch: “0” indicates the device is not write enabled “1” indicates the device is write enabled (default) R/W No Bit 2 BP0 Block Protection Bit: (See Table 7 and Table 8 for details) “0” indicates the specific blocks are not write-protected (default) “1” indicates the specific blocks are write-protected R/W Yes Bit 3 BP1 Bit 4 BP2 Bits 5 – 6 N/A Reserved: Always “0”s N/A Bit 7 SRWD Status Register Write Disable: (See Table 9 for details) “0” indicates the Status Register is not write-protected (default) “1” indicates the Status Register is write-protected R/W Yes Table 8. Block Write Protect Bits for IS25WD020 Status Register Bits Protected Memory Area BP2 BP1 BP0 2 Mbit Not used 0 0 None Not used 0 1 Upper eight (block : 3): 030000h – 03FFFFh Not used 1 0 Upper quarter (two blocks :2 and 3): 020000h – 03FFFFh Not used 1 1 Upper half (four blocks :0 to 3): 000000h – 03FFFFh Table 8-1. Block Write Protect Bits for IS25WD040 Status Register Bits Protected Memory Area BP2 BP1 BP0 4 Mbit 0 0 0 None 0 0 1 Upper eight (block : 7): 070000h – 07FFFFh 0 1 0 Upper quarter (two blocks :6 and 7): 060000h – 07FFFFh 0 1 1 Upper half (four blocks :4 to 7): 040000h – 07FFFFh 1 0 0 All Blocks (Block 0 to 7): 000000h – 07FFFFh 1 0 1 1 1 0 1 1 1 |
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