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TMS320C5545AZQW06 Datasheet(PDF) 11 Page - Texas Instruments |
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TMS320C5545AZQW06 Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 128 page  11 TMS320C5545 www.ti.com SPRS853C – JULY 2013 – REVISED MARCH 2016 Submit Documentation Feedback Product Folder Links: TMS320C5545 Terminal Configuration and Functions Copyright © 2013–2016, Texas Instruments Incorporated Table 4-1. Oscillator and PLL Terminal Functions (continued) SIGNAL TYPE (1) (2) OTHER(3) (4) DESCRIPTION NAME NO. VSSA_PLL E8 GND See Section 5.3, Recommended Operating Conditions Analog PLL ground for the system clock generator (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, BH = Bus-holder (2) Input pins of type I, I/O, and I/O/Z are required to be driven at all times. To achieve the lowest power, these pins must not be allowed to float. When configured as input or high-impedance state, and not driven to a known state, they may cause an excessive I/O-supply current. If this is the case, enable IPD and IPU, if applicable, or externally terminate the pins. (3) IPD = Internal pulldown, IPU = Internal pullup. For more detailed information on pullup and pulldown resistors and situations where external pullup and pulldown resistors are required, see Section 6.8.1, Pullup and Pulldown Resistors. (4) Specifies the operating I/O supply voltage for each signal 4.2.2 RTC Terminal Functions Table 4-2 identifies the external signal names, the associated pin (ball) numbers along with the mechanical package designator, the pin type, whether the pin has any internal pullup or pulldown resistors or bus-holders, and a functional pin description. For more detailed information on device configuration, peripheral selection, multiplexed and shared pins, and debugging considerations, see Section 6, Device Configuration. Table 4-2. Real-Time Clock Terminal Functions SIGNAL TYPE (1) (2) OTHER(3) (4) DESCRIPTION NAME NO. RTC_XO E11 I/O/Z – CVDDRTC DVDDRTC Real-time clock oscillator output. This pin operates at the RTC core voltage, CVDDRTC, and supports a 32.768-kHz crystal. If the RTC oscillator is not used, it can be disabled by connecting RTC_XI to CVDDRTC and RTC_XO to ground (VSS). A voltage must still be applied to CVDDRTC by an external power source (see Section 5.3, Recommended Operating Conditions). None of the on-chip LDOs can be used to power CVDDRTC. Note: When RTC oscillator is disabled, the RTC registers (I/O address range 1900h to 197Fh) are not accessible. RTC_XI F11 I – CVDDRTC DVDDRTC Real-time clock oscillator input. If the RTC oscillator is not used, it can be disabled by connecting RTC_XI to CVDDRTC and RTC_XO to ground (VSS). A voltage must still be applied to CVDDRTC by an external power source (see Section 5.3, Recommended Operating Conditions). None of the on-chip LDOs can be used to power CVDDRTC. Note: When RTC oscillator is disabled, the RTC registers (I/O address range 1900h to 197Fh) are not accessible. |
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