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TPS65010RGZT Datasheet(PDF) 38 Page - Texas Instruments

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Part # TPS65010RGZT
Description  Power and Battery Management IC for Li-Ion Powered Systems
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS65010RGZT Datasheet(HTML) 38 Page - Texas Instruments

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TPS65010
SLVS149C – JUNE 2003 – REVISED SEPTEMBER 2015
www.ti.com
7.6 Register Maps
7.6.1 CHGSTATUS Register (Address: 01h—Reset: 00h)
Table 5. CHGSTATUS Register
CHGSTATUS
B7
B6
B5
B4
B3
B2
B1
B0
Name
USB charge
AC charge
Thermal
Term Current
Taper
Chg Timeout
Prechg
BattTemp
Suspend
Timeout
Timeout
error
Default
0
0
0
0
0
0
0
0
Read/write
R
R
R
R
R/W
R/W
R/W
R
The CHGSTATUS register contents indicate the status of charge.
Bit 7 - USB charge:
0 = inactive.
1 = USB source is present and in the range valid for charging. B7 remains active as long as the charge
source is present.
Bit 6 - AC charge:
0 = wall plug source is not present and/or not in the range valid for charging.
1 = wall plug source is present and in the range valid for charging. B6 remains active as long as the charge
source is present.
Bit 5 - Thermal suspend:
0 = charging is allowed
1 = charging is momentarily suspended due to excessive power dissipation on chip.
Bit 4 - Term current:
0 = charging, charge termination current threshold has not been crossed.
1 = charge termination current threshold has been crossed and charging has been stopped. It can be due to
a battery reaching full capacity, or it can be due to a battery removal condition.
Bit 3 - 1 Prechg Timeout, Chg Timeout, Taper Timeout:
0 = charging
1 = one of the timers has timed out and charging has been terminated.
Bit 0 - BattTemp error: Battery temperature error
0 = battery temperature is inside the allowed range and that charging is allowed.
1 = battery temperature is outside of the allowed range and that charging is suspended.
B1-4 may be reset through the serial interface in order to force a reset of the charger. Any attempt to write to B0
and B5-7 is ignored. A 1 in B<7:0> sets the INT pin active unless the corresponding bit in the MASK register is
set.
7.6.2 REGSTATUS Register (Address: 02h—Reset: 00h)
Table 6. REGSTATUS Register
REGSTATUS
B7
B6
B5
B4
B3
B2
B1
B0
PGOOD
PGOOD
PGOOD
PGOOD
Bit name
PB_ONOFF
BATT_COVER
UVLO
LDO2
LDO1
MAIN
CORE
Default
0
0
0
0
0
0
0
0
Read/write
R
R
R
R
R
R
R
R
Bit 7 - PB_ONOFF:
0 = inactive
1 = user activated the PB_ONOFF switch to request that all rails are shut down.
Bit 6 - BATT_COVER:
0 = BATT_COVER pin is high.
38
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