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PI6LC48H04 Datasheet(PDF) 7 Page - Pericom Semiconductor Corporation |
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PI6LC48H04 Datasheet(HTML) 7 Page - Pericom Semiconductor Corporation |
7 / 11 page 7 www.pericom.com PI6LC48H04 Rev.A 04/07/2015 All trademarks are property of their respective owners. PI6LC48H04 PCIe 3.0 and Ethernet Clock Generator with 4 HCSL Outputs HCSL Output AC Characteristics (VDD = 2.5V ±5%, TA = -40°C to +85°C) Symbol Parameter Conditions Min. Typ. Max. Unit FIN Input Frequency 25 MHz FOUT Output Frequency 100 200 MHz VOH Output High Voltage (1,2) 100 MHz HCSL output @ VDD = 2.5V 660 800 900 mV VOL Output Low Voltage(1,2) 100 MHz HCSL output @ VDD = 2.5V -150 0 mV VCPA Crossing Point Voltage(1,2) Absolute @100MHz 250 350 550 mV VCN Crossing Point Voltage(1,2,4) Variation over all edges@100MHz 140 mV JCC Jitter, Cycle-to-Cycle(1,3) 35 60 ps JPeriod Period jitter 26 40 ps JPhase RMS Phase Jitter, (Random) 100MHz 25MHz Xtal input, 12kHz - 20MHz 0.32 0.5 ps 125MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps 156.25MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps 200MHz 25MHz Xtal input, 12kHz - 20MHz 0.3 0.5 ps JRMS2.0 PCIe 2.0 RMS Jitter PCIe 2.0 Test Method @ 100MHz Output 3.1 ps JRMS3.0 PCIe 3.0 RMS Jitter PLL L-BW @ 2M & 5M 1st H3 1.42 3 ps PLL L-BW @ 2M & 4M 1st H3 2.05 3 ps PLL H-BW @ 2M & 5M 1st H3 0.45 1 ps PLL H-BW @ 2M & 4M 1st H3 0.45 1 ps t OR Rise Time(1,2) From 0.175V to 0.525V 175 700 ps t OF Fall Time(1,2) From 0.525V to 0.175V 175 700 ps t RF Slew Rate Differential Slew Rate +150mV / -150mV 1.1 2.7 5.5 V/ns TSKEW Skew between outputs At Crossing Point Voltage 25 ps TDUTY-CYCLE Duty Cycle(1,3) 45 55 % TOE Output Enable Time(5) All outputs 10 μs TOT Output Disable Time(5) All outputs 10 μs tSTABLE Stabilization Time From Power-up VDD=2.5V 20 ms Notes: 1. CL = 2 pF 2. Single-ended waveform 3. Differential waveform 4. Measured at the crossing point 5. CLK pins are tri-stated when OE is LOW 15-0047 |
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