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TPS2065CDBVT Datasheet(PDF) 5 Page - Texas Instruments |
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TPS2065CDBVT Datasheet(HTML) 5 Page - Texas Instruments |
5 / 39 page 1 OUT 2 GND 3 FLT 4 EN/EN 5 IN 5 TPS2000C, TPS2001C, TPS2041C, TPS2051C, TPS2061C TPS2065C, TPS2065C-2, TPS2068C, TPS2069C, TPS2069C-2 www.ti.com SLVSAU6H – JUNE 2011 – REVISED APRIL 2016 Product Folder Links: TPS2000C TPS2001C TPS2041C TPS2051C TPS2061C TPS2065C TPS2065C-2 TPS2068C TPS2069C TPS2069C-2 Submit Documentation Feedback Copyright © 2011–2016, Texas Instruments Incorporated DBV Package 5-Pin SOT-23 Top View Pin Functions - 5 Pins PIN I/O DESCRIPTION NAME NO. EN/EN 4 I Enable input, logic high turns on power switch FLT 3 O Active-low open-drain output, asserted during overcurrent, or overtemperature conditions GND 2 — Ground connection IN 5 PWR Input voltage and power-switch drain; connect a 0.1-µF or greater ceramic capacitor from IN to GND close to the IC OUT 1 PWR Power-switch output, connect to load. (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Absolute maximum ratings apply over recommended junction temperature range. (3) Voltages are with respect to GND unless otherwise noted. (4) See Input and Output Capacitance. 7 Specifications 7.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) (2) (3) MIN MAX UNIT Voltage on IN, OUT, EN or EN, FLT (4) –0.3 6 V Voltage from IN to OUT –6 6 V Maximum junction temperature, TJ Internally Limited Storage temperature, Tstg –60 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. (3) VOUT was surged on a PCB with input and output bypassing per the Typical Application Diagram on the first page (except input capacitor was 22 µF) with no device failures. 7.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) ±2000 V Charged-device model (CDM), per JEDEC specification JESD22-C101(2) ±500 IEC 61000-4-2 contact discharge ±8000 IEC 61000-4-2 air-gap discharge(3) ±15000 |
Similar Part No. - TPS2065CDBVT |
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Similar Description - TPS2065CDBVT |
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