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TTP229-HSB Datasheet(PDF) 6 Page - Tontek Design Technology |
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TTP229-HSB Datasheet(HTML) 6 Page - Tontek Design Technology |
6 / 12 page Preliminary TTP229-HSB TonTouchTM 09’/12/22 Page 6 of 12 Ver : 1.1 2. Input keys number The TTP229-HSB has only 8 keys input mode. 3. Output mode The TTP229-HSB only has a 2-wires serial output interface mode. At the serial output interface mode the SDO pin is data output pin, the SCL is clock input pin, both can be set active-high and active-low by TP1(SAHL) pin. The default is active-low that TP1(SAHL) pin is not used resistor connected to VSS. Another it is active-high that is used a high-value resistor connected to VSS. The 2-wires serial mode supports always polling data for other device on the system. Or other device can wait that TTP229-HSB outputs the data valid (DV) signal by the SDO pin, and it can give the clock signal to TTP229-HSB SCL pin and get the key data from SDO pin. The TTP229-HSB 2-wires serial interface supports a timeout mechanism for SCL pin. If the SCL pin has no signal edge change over 2ms, the 2-wires serial interface will reset itself and return to stand-by state. 2-wires serial interface mode timing please see below: The D0~D7 correspond to data of the TP0~TP7. 3-4-1. When TP1=0:Set 8-keys active-high Tw Tw Tout T_resp DV D0 D1 C_1 C_0 DV SDO SCL F_SCL D0 D1 C_1 C_0 D7 D6 D5 D4 D3 D2 C_7 C_6 C_5 C_4 C_3 C_2 Figure 3-4-1: The timing for active-high 3-4-2. When TP1=1:Set 8-keys active-low Tw Tw Tout T_resp DV D0 D1 C_1 C_0 DV SDO SCL F_SCL D0 D1 C_1 C_0 D7 D6 D5 D4 D3 D2 C_7 C_6 C_5 C_4 C_3 C_2 Figure 3-4-2: The timing for active-low The parameters for figure 3-4-1~2: Parameter Min. Typ. Max. Unit DV - 93 - us Tw 10 - - us Tout - 2 - ms T_resp - 16 - ms F_SCL 1K - 512K Hz |
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