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PI6C5946004 Datasheet(PDF) 9 Page - Pericom Semiconductor Corporation |
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PI6C5946004 Datasheet(HTML) 9 Page - Pericom Semiconductor Corporation |
9 / 12 page 9 PI6C5946004 Rev A 10/29/14 PI6C5946004 6 GHz / 12 Gbps Clock / Data Fanout Buffer with Internal Termination Device LVPECL Output Terminations LVPECL Output Popular Termination The most popular LVPECL termination is 150ohm pull-down bias and 100ohm across at RX side. Please consult ASIC data- sheet if it already has 100ohm or equivalent internal termina- tion. If so, do not connect external 100ohm across as shown in Fig. 8. This popular termination’s advantage is that it does not allow any bias through from VDD. This prevents VDD system noise coupling onto clock trace. LVPECL Output Thevenin Termination Fig. 9 shows CML output Thevenin termination which is used for shorter trace drive (<5in.), but it takes VDD bias current and VDD noise can get onto clock trace. It also requires more com- ponent count. So it is seldom used today. Fig. 8 LVPECL Output Popular Termination Fig. 9 LVPECL Thevenin Output Termination CML Output AC Thevenin Termination CML AC Thevenin terminations require a 150ohm pull-down before the AC coupling capacitor at the source as shown in Fig. 10. Note that pull-up/down resistor value is swapped compared to Fig. 9. This circuit is good for short trace (<5in.) application only. CML Output Drive HCSL Input Using the CML output to drive a HCSL input can be done using a typical CML AC Thenvenin termination scheme. Use pull-up/ down 450/60ohm to generate Vcm=0.4V for the HCSL input clock. This termination is equivalent to 50Ohm load as shown in Fig. 11. Fig. 11 CML Output Drive HCSL Termination Fig. 10 CML Output AC Thenvenin Termination 14-0179 |
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