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TPS74701DRCT Datasheet(PDF) 3 Page - Texas Instruments |
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TPS74701DRCT Datasheet(HTML) 3 Page - Texas Instruments |
3 / 30 page OUT OUT FB SS GND 10 9 8 7 6 IN IN PG BIAS EN 1 2 3 4 5 Thermal Pad TPS74701 www.ti.com SBVS099G – NOVEMBER 2007 – REVISED OCTOBER 2015 5 Pin Configuration and Functions DRC Package 10-Pin SON Top View Pin Functions PIN I/O DESCRIPTION NAME NO. IN 1, 2 I Input to the device. Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator EN 5 I into shutdown mode. This pin must not be left unconnected. SS 7 — Soft-Start pin. A capacitor connected on this pin to ground sets the start-up time. If this pin is left unconnected, the regulator output soft-start ramp time is typically 200 μs. BIAS 4 I Bias input voltage for error amplifier, reference, and internal control circuits. Power Good pin. An open-drain, active-high output that indicates the status of VOUT. When VOUT exceeds the PG trip threshold, the PG pin goes into a high-impedance state. When VOUT is below this threshold the pin is driven to a low-impedance state. A pullup resistor from PG 3 O 10 k Ω to 1 MΩ should be connected from this pin to a supply of up to 5.5 V. The supply can be higher than the input voltage. Alternatively, the PG pin can be left unconnected if output monitoring is not necessary. Feedback pin. The feedback connection to the center tap of an external resistor divider FB 8 I network that sets the output voltage. This pin must not be left floating. OUT 9, 10 O Regulated output voltage. A small capacitor (total typical capacitance ≥ 2.2 μF, ceramic) is needed from this pin to ground to assure stability. NC N/A I No connection. This pin can be left floating or connected to GND to allow better thermal contact to the top-side plane. GND 6 I Ground Thermal Pad — I Should be soldered to the ground plane for increased thermal performance. Copyright © 2007–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS74701 |
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