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UCC28950PW Datasheet(PDF) 57 Page - Texas Instruments |
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UCC28950PW Datasheet(HTML) 57 Page - Texas Instruments |
57 / 74 page QC g QD g QD d t CDSET = t 1 - t 0 Set t CDSET at resonant tank Peak and Valley t 0 t 1 t 2 t 3 t 4 t CDSET = t 4 - t 3 Miller Plateau t 5 Miller Plateau t MILLER = t 2 - t 1 t MILLER = t 5 - t 4 CD R 30.1k = W ( ) CDSET CD A T R 0.26 CS K 1.3 30.6k 5 = ´ + ´ ´ » W ABSET CDSET t t = UCC28950 www.ti.com SLUSA16C – MARCH 2010 – REVISED NOVEMBER 2015 The QC and QD turnon delays (tCDSET) should be initially set for the same delay as the QA and QB turn on delays (Pin 6). The following equations program the QC and QD turn-on delays (tCDSET) by properly selecting resistor RDELCD (Pin 7). (153) Resistor RCD programs tCDSET: (154) Select a standard resistor for the design: (155) NOTE Once you have a prototype up and running it is recommended to fine tune tCDSET at light load. In this design the CD node was set to valley switch at roughly 10% load. Please refer to Figure 54. Obtaining ZVS at lighter loads with switch node QDd is easier due to the reflected output current present in the primary of the transformer at FET QD and QC turnoff/on. This is because there was more peak current available to energize LS before this transition, compared to the QA and QB turnoff/on. Figure 54. tCDSET to Achieve Valley Switching at Light Loads Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 57 Product Folder Links: UCC28950 |
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