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TB6556FG Datasheet(PDF) 6 Page - Toshiba Semiconductor |
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TB6556FG Datasheet(HTML) 6 Page - Toshiba Semiconductor |
6 / 22 page ![]() TB6556FG 2012-10-22 6 Pin Description Symbol Input/Output Signal Input/Output Internal Circuit Upper limit for LA UL Clip upper limit for LA UL = 0 V to 5.0 V When LL UL, LA is fixed at LL value. Setting dead time input pin L: 3.8 μs H or OPEN: 1.9 μs Td Digital L: 0.8 V (max) H: Vrefout − 1 V (min) Output logic select signal input pin L: Active LOW H: Active HIGH OS Digital L: 0.8 V (max) H: Vrefout − 1 V (min) Overcurrent protection signal input pin Idc Analog Digital filter: 1 μs (typ.) Gate protected at 0.5 V or higher (released at carrier cycle) Clock signal input pin Xin Clock signal output pin Xout Operating range 2 MHz to 8 MHz (ceramic oscillation) 360 k Ω Vrefout Vrefout Xout Xin Vrefout Vrefout 2 k Ω Vrefout Vrefout 2 k Ω VCC 200 k Ω Comparator Gout Gin 100 Ω 100 Ω VCC |
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