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SP791CP Datasheet(PDF) 11 Page - Sipex Corporation |
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SP791CP Datasheet(HTML) 11 Page - Sipex Corporation |
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11 / 19 page  11 SP791DS/08 SP791 Low Power Microprocessor Supervisory with Battery Switch-Over © Copyright 2000 Sipex Corporation The 10ns maximum CE propagation from CE IN to CE OUT enables the SP791 to be used with most µPs. CHIP-ENABLE INPUT CE IN is high impedance (disabled mode) while RESET is asserted. During a power-down sequence where VCC falls below 4.65V, CE IN assumes a high impedance state when the voltage at CE IN goes high or 15 µs after RESET is asserted, whichever occurs first, (Figure 7). During a power-up sequence, CE IN remains high impedance until RESET is deasserted. In the high-impedance mode, the leakage currents into this input are less than 1 µA over temperature. In the low-impedance mode, the impedance of CE IN appears as a 65 Ω resistor in series with the load at CE OUT. The propagation delay through the CE transmission gate depends on both the source impedance of the drive to CE IN and the capacitive loading on CE OUT (see the Chip- Enable Propagation Delay vs. CE OUT Load Capacitance graph in the Typical Operating Characteristics). The CE propagation delay is defined from the 50% point on CE IN to the 50% point on CE OUT using a 50 Ω driver with 50pF load capacitance as in Figure 8. For minimum propagation delay, minimize the capacitive load at CE OUT and use a low output-impedance driver. CHIP-ENABLE OUTPUT In the enabled mode, the impedance of CE OUT is equivalent to 65 Ω in series with the source driving CE IN. In the disabled mode, the 65 Ω transmission gate is off and CE OUT is actively pulled to VOUT. This source turns off when the transmission gate is enabled. Figure 8. CE Propagation Delay Test Circuit Figure 7. Reset and Chip-Enable Timing +5V Vcc 50 Ω Driver GND CE IN CE OUT 50pF CLOAD Corporation Vcc CE IN CE OUT RESET 15 µs 100 µs 100 µs RESET THRESHOLD |
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