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SP6650EU Datasheet(PDF) 5 Page - Sipex Corporation |
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SP6650EU Datasheet(HTML) 5 Page - Sipex Corporation |
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5 / 17 page  5 Date: 5/25/04 SP6650 High Efficiency 600mA Synchronous Buck Regulator © Copyright 2004 Sipex Corporation OPERATION The SP6650 is a synchronous buck regulator with an input voltage range of +2.7V to +6.5V and an output that is either preset to +3.3V, or adjustable between +1.25V and VIN. The SP6650 features a unique on-time control loop that runs in discontinuous conduction mode (DCM) or continuous conduction mode (CCM) using syn- chronous rectification. Other features include overtemperature shutdown, overcurrent protec- tion, undervoltage lockout, digitally controlled enable, a battery low indicator, and an external feedback pin. The SP6650 operates with a light load quiescent current of 70 µA using a 0.4Ω PMOS main switch and a 0.3 Ω NMOS auxiliary switch. It operates with excellent efficiency across the entire load range, making it an ideal solution for battery powered applications and low current step-down conversions. The part smoothly tran- sitions into a 100% duty cycle under heavy load/ low input voltage conditions. On-Time Control The SP6650 uses a precision comparator and a minimum on-time one-shot to regulate the out- put voltage and control the inductor current under normal load conditions. As the feedback node (negative terminal of the loop comparator) drops below the reference, the loop comparator output goes high and closes the main switch. The minimum on-time one shot is triggered, setting a logic high for the duration defined by: TON = KON VIN-VOUT where: KON = 2.7µs*V constant VIN = VIN pin voltage VOUT = VOUT pin voltage The outputs of the loop comparator and the on- time one shot are OR'd together, inverted, and buffered to drive the gate of the high side PMOS main switch. Increasing inductor current causes the output to increase through the ESR (equiva- lent series resistance) of the output capacitor. As VOUT rises above the regulation threshold, the loop comparator output resets low. Termination of the on cycle occurs when both the loop comparator and the on-time one shot goes to logic low, or the inductor current limit has been reached. The discharge phase follows with the high side PMOS switch opening and the low side NMOS switch closing to provide a discharge path for the inductor current. The decreasing inductor current and the load current cause the output voltage to droop. Under normal load conditions when the inductor current is below the pro- grammed limit, the off-time will continue until the output voltage falls below the regulation threshold, which initiates a new charge cycle via the loop comparator. The inductor current "floats" in continuous con- duction mode. During this mode the inductor peak current is below the programmed limit and the valley current is above zero. This is to satisfy load currents that are greater than half the mini- mum current ripple. The current ripple, ILR, is defined by the equation: ILR ≈ KON * VIN-VOUT-IOUT*Rch LVIN-VOUT where: L= Inductor value IOUT = Load current Rch = PMOS on resistance, 0.4 Ω typ. If the IOUT*Rch term is negligible compared with (VIN-VOUT), the above equation simplifies to: ILR ≈ KON L For most applications, the inductor current ripple controlled by the SP6650 is constant regardless of input and output voltage. Because the output voltage ripple is equal to: VOUT(ripple) = ILR*RESR where: RESR = ESR of the output capacitor the output ripple of the SP6650 regulator is independent of the input and output voltages. For battery powered applications, where the battery voltage changes significantly, the SP6650 provides constant output voltage ripple through- out the battery lifetime. This greatly simplifies the LC filter design. |
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