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SP6132HV Datasheet(PDF) 3 Page - Sipex Corporation |
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SP6132HV Datasheet(HTML) 3 Page - Sipex Corporation |
3 / 14 page 3 Date: 5/5/04 SP6132H Dual Supply, Synchronous Buck Controller © Copyright 2004 Sipex Corporation PARAMETER MIN TYP MAX UNITS CONDITIONS TIMERS: SOFTSTART SS Charge Current: 10 µA SS Discharge Current: 1 mA ♦ Fault Present, SS = 0.2V PROTECTION: SHORT CIRCUIT & THERMAL Short Circuit Threshold Voltage 0.2 0.25 0.3 V Measured VREF (0.8V) - VFB Hiccup Timeout 200 ms VFB = 0.5V Number of Allowable Clock Cycles 20 Cycles VFB = 0.7V at 100% Duty Cycle Minimum GL Pulse After 20 Cycles 0.5 Cycles VFB = 0.7V Thermal Shutdown Temperature 145 °C Thermal Recovery Temperature 135 °C Thermal Hysteresis 10 °C OUTPUT: NFET GATE DRIVERS GH & GL Rise Times 35 50 ns ♦ Measured 10% to 90% GH & GL Fall Times 30 40 ns ♦ Measured 90% to 10% GL to GH Non Overlap Time 45 70 ns ♦ GH & GL Measured at 2.0V SWN to GL Non Overlap Time 25 40 ns ♦ Measured SWN = 100mV to GL = 2.0V GH & GL Pull Down Resistance 15 50 85 KΩ ♦ ELECTRICAL SPECIFICATIONS: Continued Unless otherwise specified: 0°C < TAMB < 70°C, 4.5V < VCC < 5.5V, BST=VCC,SWN = GND = 0V, UVIN = 3.0V, CVCC = 10µF, CCOMP = 0.1µF, CGH = CGL = 3.3nF, CSS = 50nF, Typical measured at VCC=5V. The ♦ denotes the specifications which apply over the full operating temperature range, unless otherwise specified. PIN DESCRIPTION PIN # PIN NAME DESCRIPTION 1VCC Bias Supply Input. Connect to external 5V supply. Used to power internal circuits and low side gate driver. 2GL High current driver output for the low side NFET switch. It is always low if GH is high or during a fault. Resistor pull down ensure low state at low voltage. 3 GND Ground Pin. The control circuitry of the IC and lower power driver are referenced to this pin. Return separately from other ground traces to the (-) terminal of COUT. 4VFB Feedback Voltage and Short Circuit Detection pin. It is the inverting input of the Error Amplifier and serves as the output voltage feedback point for the Buck Converter. The output voltage is sensed and can be adjusted through an external resistor divider. Whenever VFB drops 0.25V below the positive reference, a short circuit fault is detected and the IC enters hiccup mode. 5 COMP Output of the Error Amplifier. It is internally connected to the non-inverting input of the PWM comparator. An optimal filter combination is chosen and connected to this pin and either ground or VFB to stabilize the voltage mode loop. 6 UVIN UVLO input for VIN voltage. Connect a resistor divider between VIN and UVIN to set minimum operating voltage. 7SS Soft Start. Connect an external capacitor between SS and GND to set the soft start rate based on the 10µA source current. The SS pin is held low via a 1mA (min) current during all fault conditions. 8 SWN Lower supply rail for the GH high-side gate driver. Connect this pin to the switching node at the junction between the two external power MOSFET transistors. 9GH High current driver output for the high side NFET switch. It is always low if GL is high or during a fault. Resistor pull down ensure low state at low voltage. 10 BST High side driver supply pin. Connect BST to the external boost diode and capacitor as shown in the Typical Application Circuit on page 1. High side driver is connected between BST pin and SWN pin. |
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