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LMG5200 Datasheet(PDF) 3 Page - Texas Instruments |
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LMG5200 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 23 page  5 4 6 7 LMG5200 8 1 3 2 9 HI LI SW SW PGND VIN LMG5200 www.ti.com SNOSCY4B – MARCH 2015 – REVISED JANUARY 2016 5 Pin Configuration and Functions MOF (QFN) PACKAGE 9 PINS (TOP VIEW) Pin Functions PIN I/O(1) DESCRIPTION NAME NO. AGND 7 G Analog ground. Ground of driver device. HB 2 P High-side gate driver bootstrap rail. HI 4 I High-side gate driver control input HS 3 P High-side GaN FET source connection LI 5 I Low-side driver control input PGND 9 G Power ground. Low-side GaN FET source. Electrically shorted to AGND pin. SW 8 P Switching node. Electrically shorted to HS pin. VCC 6 P 5-V positive gate drive supply VIN 1 P Input voltage pin. Electrically connected to high-side GaN FET drain. (1) I = Input, O = Output, G = Ground, P = Power Copyright © 2015–2016, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMG5200 |
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