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M21528-13 Datasheet(PDF) 16 Page - M/A-COM Technology Solutions, Inc.

Part No. M21528-13
Description  Dual 3G/HD/SD-SDI Multi-rate Video Cable Driver
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Maker  MA-COM [M/A-COM Technology Solutions, Inc.]
Homepage  http://www.macomtech.com

M21528-13 Datasheet(HTML) 16 Page - M/A-COM Technology Solutions, Inc.

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M/A-COM Technology Solutions Inc. (MACOM) and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice.
Visit www.macom.com for additional data sheets and product information.
For further information and support please visit:
Dual 3G/HD/SD-SDI Multi-rate Video Cable Driver
Rev V4
Alternatively, a “self-biasing” scheme can be used at the input. This offers the benefit of having the VDD of the
previous device and the power domain(s) of the M21528 completely separated, while allowing dc coupling:
Previous device
In this configuration, the minimum input common mode that can be tolerated, is 1.2V.
If, for any reason, AC coupling is necessary, then a capacitor of 4.7 µF or greater must be used.
A Loss of Signal (LOS) detector circuit monitors each input and issues an internal alarm when the input signal goes
below the detection threshold. The detection threshold is 90 mVpp with +90 mV hysteresis. This means that if the
input signal level drops below 90 mVpp, then the internal LOS alarm is asserted. For the alarm to be de-asserted,
the input signal must increase to greater than 180 mVpp; the hysteresis prevents the internal LOS alarm from
Depending on the state of the PD_MODE pin, the LOS alarm at a particular input can power down the associated
signal path and forces the corresponding output to low level.
Output Description
The M21528 contains two independent signal channels, each with two positive polarity cable driver outputs. Unlike
conventional SMPTE compliant cable drivers, the M21528 uses a voltage mode implementation as opposed to
current mode. This allows for significant power savings when compared to previous generation cable drivers with
the added benefit of two positive polarity outputs per channel.
Internally an output buffer drives a 1.6V amplitude signal through an integrated impedance load. The impedance of
the load is set by the external Z_CTRL resistor to AVSS. For most applications Z_CTRL should be 665, which
sets the output load to 75
 and provides 800mVpp output swing. If the application requires a 50 output
impedance, Z_CTRL may be 250
. In both cases Z_CTRL must have 1% tolerance.
The M21528 can meet SMPTE ORL specifications without the need for an external matching network. However,
for additional margin a matching network consisting of a 75
 resistor and a 1 nH inductor may be used.
Each channel has a dedicated power down pin, PD0 and PD1. The operation of the PD pin is summarized in
Table 4-2 below. When powered down, the signal at the output is set to low.

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