Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

LM21215AMHX-1/NOPB Datasheet(PDF) 13 Page - Texas Instruments

Click here to check the latest version.
Part No. LM21215AMHX-1/NOPB
Description  15-A Ultra High-Efficiency Synchronous Buck Converter
Download  38 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  TI1 [Texas Instruments]
Homepage  http://www.ti.com
Logo 

LM21215AMHX-1/NOPB Datasheet(HTML) 13 Page - Texas Instruments

Zoom Inzoom in Zoom Outzoom out
 13 / 38 page
background image
Vss
VFB
VEN
VPGOOD
VSW
OVP
UVP
PRE-BIASED
STARTUP
DISABLE
Vovp
Vuvp
tPGDGL
0.6V
t RESETSS
t PGDGH
VOVPHYS
VUVPHYS
LM21215A
www.ti.com
SNOSB87C – MARCH 2011 – REVISED JANUARY 2016
Feature Description (continued)
As shown above, the soft-start capacitance is set by the nominal feedback voltage level 0.6 V, the soft-start
charging current ISS, and the desired soft-start time. If a soft-start capacitor is not installed, the LM21215A
defaults to a soft-start time of 500 µs. The LM21215A cannot startup faster than 500 µs. When Enable is cycled
or the device enters UVLO, the soft-start capacitor is discharged to reset the startup process. This also occurs
when the device enters short circuit mode following an overcurrent event.
7.3.4 PGOOD Indicator
The PGOOD flag provides the user with a way to monitor the status of the LM21215A. In order to use the
PGOOD function, the application must provide a pullup resistor to a desired DC voltage, for example VIN.
PGOOD responds to a fault condition by pulling PGOOD low with the open-drain output. PGOOD pulls low on
the following conditions: 1) VFB moves above or below the VOVP or VUVP, respectively; 2) The EN voltage is
brought below the Enable turn-off threshold; 3) A pre-biased output condition exists (VFB > VSS/TRK). PGOOD has
12
μs and 15 μs of built-in deglitch time for rising and falling edges, respectively.
Figure 24 shows the conditions that cause PGOOD to respond.
Figure 24. PGOOD Indicator Operation
7.3.5 Frequency Synchronization
The SYNC pin allows the LM21215A to be synchronized to an external clock frequency. When a clock signal
within the allowable frequency range of 300 kHz to 1.5 MHz is present on SYNC, an internal PLL synchronizes
the turn-on of the high-side MOSFET (SW voltage rising) to the negative edge of the clock signal, as seen in
Figure 25.
The clock signal can be present on the SYNC pin before the device is powered on without loading of the clock
signal. Alternatively, if a clock signal is not present while the device is powered up, the default switching
frequency is 500 kHz. Once the clock signal is available, the device synchronizes to the clock frequency. The
time required to achieve synchronization depends on the clock frequency.
Copyright © 2011–2016, Texas Instruments Incorporated
Submit Documentation Feedback
13
Product Folder Links: LM21215A


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn