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APE8903C Datasheet(PDF) 5 Page - Advanced Power Electronics Corp.

Part No. APE8903C
Description  3A ULTRA LOW DROPOUT LINEAR REGULATOR
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Maker  A-POWER [Advanced Power Electronics Corp.]
Homepage  http://www.a-power.com.tw
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APE8903C Datasheet(HTML) 5 Page - Advanced Power Electronics Corp.

   
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Advanced Power
Electronics Corp.
APE8903C
PIN DESCRIPTION
FB
VIN
VCNTL
POK
EN
VOUT
FUNCTION DESCRIPTION
Power-On-Reset
Internal Soft-Start
Output Voltage Regulation
5
Connecting this pin to an external resistor divider receives the feedback voltage of the
regulator. The output voltage set by the resistor divider is determined by:
A Power-On-Reset (POR) circuit monitors both input voltages at VCNTL and VIN pins to
prevent wrong logic controls. The POR function initiates a soft-start process after the two supply
voltages exceed their rising POR threshold voltages during powering on. The POR function also
pulls low the POK pin regardless the output voltage when the VCNTL voltage falls below its falling
POR threshold.
An internal soft-start function controls rise rate of the output voltage to limit the current surge
at start-up. The typical soft-start interval is about 0.2ms.
An error amplifier working with a temperature compensated 0.8V reference and an output
NMOS regulates output to the preset voltage. The error amplifier designed with high bandwidth
and DC gain provides very fast transient response and less load regulation. It compares the
reference with the feedback voltage and amplifies the difference to drive the output NMOS which
provides load current from VIN to VOUT.
Where R1 is connected from VOUT to FB with Kelvin sensing and R2 is connected from FB
to GND. A bypass capacitor may be connected with R1 in parallel to improve load transient
response. The R2 range in 1K~4.7KΩ for AL output capacitor and 30K~100KΩ for MLCC output
capacitor are recommended.
Power input pin of the control circuitry. Connecting this pin to a +5V (recommended) supply
voltage provides the bias for the control circuitry. The voltage at this pin is monitored for Power-
On Reset purpose.
Power-OK signal output pin. This pin is an open-drain output used to indicate status of
output voltage by sensing FB voltage. This pin is pulled low when the rising FB voltage is not
above the VPOK threshold or the falling FB voltage is below the VPOK threshold, indicating the
output is not OK.
Enable control pin. Pulling and holding this pin below 0.4V shuts down the output. When re-
enabled, the IC undergoes a new soft-start cycle. For APE8903CMP-B, this pin is internal pulled
up to VCNTL voltage, enabling the regulator. For APE8903CMP-A, this pin is internal pulled down
to GND voltage, shutdown the regulator. The pull-high current is 10uA (typ.)
Output of the regulator. Please connect Pin 6 using wide tracks. It is necessary to connect
an output capacitor with this pin for closed-loop compensation and improving transient responses.
Main supply input pins for power conversions. The voltage at this pin is monitored for Power-
On Reset purpose.
.


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