S-7600A datasheet(3/60 Pages) SII

Part #	S-7600A

Description	Hardware Specification (TCP/IP Network Stack LSI)

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Manufacturer	SII [Seiko Instruments Inc]

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TCP/IP Network Stack LSI

S-7600A

Hardware Specification Revision 1.3

Seiko Instruments Inc.

i

TABLE OF CONTENTS

1.

INTRODUCTION........................................................................................................................... 1-1

1.1.

PRODUCT OVERVIEW ............................................................................................................... 1-1

1.2.

FEATURES ............................................................................................................................... 1-1

1.3.

BENEFITS................................................................................................................................. 1-1

1.4.

TRADEMARKS........................................................................................................................... 1-2

1.5.

DEFINITIONS ............................................................................................................................ 1-2

1.6.

APPLICABLE DOCUMENTS ......................................................................................................... 1-2

1.7.

CAUTIONS................................................................................................................................1-2

2.

FUNCTIONAL BLOCK DIAGRAM ............................................................................................... 2-1

3.

TERMINALS.................................................................................................................................. 3-1

3.1.

PIN ASSIGNMENT...................................................................................................................... 3-1

3.2.

PACKAGE DIMENSIONS ............................................................................................................. 3-2

3.3.

PIN DESCRIPTION..................................................................................................................... 3-3

3.4.

PIN CONFIGURATION ................................................................................................................ 3-4

4.

ELECTRICAL CHARACTERISTICS............................................................................................. 4-1

4.1.

ABSOLUTE MAXIMUM RATINGS.................................................................................................. 4-1

4.2.

RECOMMENDED OPERATING CONDITIONS ................................................................................. 4-1

4.3.

DC CHARACTERISTICS ............................................................................................................. 4-2

4.4.

POWER CURRENT CONSUMPTION ............................................................................................. 4-2

5.

MPU INTERFACE ......................................................................................................................... 5-1

5.1.

OVERVIEW ............................................................................................................................... 5-1

5.2.

PARALLEL INTERFACE............................................................................................................... 5-1

5.2.1.

68k Family MPU Mode.................................................................................................... 5-2

5.2.1.1.

Write Cycle Timing ................................................................................................................5-2

5.2.1.2.

Read Cycle Timing ................................................................................................................5-3

5.2.2.

x80 Family MPU Mode.................................................................................................... 5-4

5.2.2.1.

Write Cycle Timing ................................................................................................................5-4

5.2.2.2.

Read Cycle Timing ................................................................................................................5-5

5.3.

SERIAL INTERFACE ................................................................................................................... 5-6

5.3.1.

Write Cycle Timing.......................................................................................................... 5-6

5.3.2.

Read Cycle Timing.......................................................................................................... 5-7

5.4.

INTERRUPT............................................................................................................................... 5-8

6.

MEMORY REQUIREMENTS ........................................................................................................ 6-1

6.1.

OVERVIEW ............................................................................................................................... 6-1

6.2.

MEMORY INTERFACE ARCHITECTURE ........................................................................................ 6-1

6.3.

MEMORY MAP .......................................................................................................................... 6-2

7.

S-7600A REGISTER DEFINITIONS ............................................................................................. 7-1

7.1.

OVERVIEW ............................................................................................................................... 7-1

7.2.

I

API REGISTER MAP................................................................................................................. 7-1

7.3.

REGISTER DEFINITIONS ............................................................................................................ 7-4

7.3.1.

Revision Register (0x00)................................................................................................ 7-4

7.3.2.

General Control Register (0x01) .................................................................................... 7-4

7.3.3.

Generic Socket Location Register (0x02) ...................................................................... 7-5

7.3.4.

Master Interrupt (0x04) ..................................................................................................7-5

7.3.5.

Serial Port Configuration / Status Register (0x08) ......................................................... 7-6

7.3.6.

Serial Port Interrupt Register (0x09) .............................................................................. 7-8

7.3.7.

Serial Port Interrupt Mask Register (0x0A) .................................................................... 7-8

7.3.8.

Serial Port Data Register (0x0B).................................................................................... 7-9

7.3.9.

BAUD Rate Divider Registers (0x0C-0x0D)................................................................... 7-9

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