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54LS164 Datasheet(PDF) 1 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. 54LS164
Description  8-Bit Serial In/Parallel Out Shift Registers
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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54LS164 Datasheet(HTML) 1 Page - National Semiconductor (TI)

   
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TLF6398
June 1989
54LS164DM54LS164DM74LS164
8-Bit Serial InParallel Out Shift Registers
General Description
These 8-bit shift registers feature gated serial inputs and an
asynchronous clear A low logic level at either input inhibits
entry of the new data and resets the first flip-flop to the low
level at the next clock pulse thus providing complete con-
trol over incoming data A high logic level on either input
enables the other input which will then determine the state
of the first flip-flop Data at the serial inputs may be changed
while the clock is high or low but only information meeting
the setup and hold time requirements will be entered Clock-
ing occurs on the low-to-high level transition of the clock
input All inputs are diode-clamped to minimize transmis-
sion-line effects
Features
Y
Gated (enabledisable) serial inputs
Y
Fully buffered clock and serial inputs
Y
Asynchronous clear
Y
Typical clock frequency 36 MHz
Y
Typical power dissipation 80 mW
Y
Alternate MilitaryAerospace device (54LS164) is avail-
able Contact a National Semiconductor Sales Office
Distributor for specifications
Connection Diagram
Dual-In-Line Package
TLF6398 – 1
Order Number 54LS164DMQB 54LS164FMQB
54LS164LMQB DM54LS164J DM54LS164W
DM74LS164M or DM74LS164N
See NS Package Number E20A
J14A M14A N14A or W14B
Function Table
Inputs
Outputs
Clear
Clock
A
B
QA
QB
QH
L
X
X
X
L
L
L
HL
X
X
QA0
QB0
QH0
H
u
H
HHQAn
QGn
H
u
LX
L
QAn
QGn
H
u
XL
L
QAn
QGn
H e High Level (steady state) L e Low Level (steady state)
X e Don’t Care (any input including transitions)
u e Transition from low to high level
QA0 QB0 QH0 e The level of QA QB orQH respectively before the
indicated steady-state input conditions were established
QAn QGn e The level of QA or QG before the most recent
u transition of
the clock indicates a one-bit shift
Logic Diagram
TLF6398 – 2
C1995 National Semiconductor Corporation
RRD-B30M105Printed in U S A


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