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LP8556TME-E03 Datasheet(PDF) 10 Page - Texas Instruments |
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LP8556TME-E03 Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 63 page  10 LP8556 SNVS871I – JULY 2012 – REVISED MARCH 2016 www.ti.com Product Folder Links: LP8556 Submit Documentation Feedback Copyright © 2012–2016, Texas Instruments Incorporated (1) Minimum (MIN) and Maximum (MAX) limits are specified by design, test, or statistical analysis. Typical numbers are for information only. 7.9 Electrical Characteristics — Logic Interface (1) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT LOGIC INPUTS (PWM, SDA, SCL) VIL Input low level –30°C ≤ TA ≤ 85°C 0.3 × VDDIO V VIH Input high level –30°C ≤ TA ≤ 85°C 0.7 × VDDIO V II Input current (VDDIO = 0 V or 3.6 V), (VI = 0 V or 3.6 V), –30°C ≤ TA ≤ 85°C –1 1 µA LOGIC OUTPUTS (SDA) VOL Output low level IOUT = 3 mA (pull-up current) 0.3 V IOUT = 3 mA (pull-up current), –30°C ≤ TA ≤ 85°C 0.3 0.4 IL Output leakage current VOUT = 5 V, –30°C ≤ TA ≤ 85°C –1 1 µA (1) Verified by design and not tested in production. 7.10 I 2C Serial Bus Timing Parameters (SDA, SCL)(1) MIN MAX UNIT ƒSCL Clock frequency 400 kHz 1 Hold time (repeated) START condition 0.6 µs 2 Clock low time 1.3 µs 3 Clock high time 600 ns 4 Setup time for a repeated START condition 600 ns 5 Data hold time 50 ns 6 Data set-up time 100 ns 7 Rise time of SDA and SCL 20 + 0.1Cb 300 ns 8 Fall time of SDA and SCL 15 + 0.1Cb 300 ns 9 Setup time for STOP condition 600 ns 10 Bus-free time between a STOP and a START condition 1.3 µs Cb Capacitive load parameter for each bus line load of 1 pF corresponds to 1 ns. 10 200 ns Figure 1. I2C-Compatible Timing |
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