Supply voltage Supervisor TL77xx Series

1

Supply Voltage Supervisor TL77xx Series

ABSTRACT

After power-on a digital system must be forced into a definite initial state. For microcomputers and microprocessors a

Reset input is provided to which, in simple applications, an R/C network is connected. After power-on, this circuitry

maintains the logic level at this input high (or low), until the supply voltage has reached its nominal value, and the

internal logic of the microcomputer has executed the Reset. However, this simple circuit does not work well under all

conditions, or during short drops of the supply voltage. This applications report describes the operation and the

application of the supply voltage supervisor circuits series TL77xx, which has been specially designed to solve these

applications problems.

1. Introduction

After power-on a digital system must normally be forced into a definite initial state. For microcomputers

and microprocessors a reset input is provided to which, in simple applications, an R/C network is

connected. After power-on, this circuitry maintains the logic level at this input high (or low), until the supply

voltage has reached its nominal value, and the internal logic of the microcomputer has executed the

initialization of the system.

Figure 1. Reset circuit

However, this circuit does not work well during short drops of the supply voltage. In this case, the capacitor

C must be quickly discharged via the diode D, which will occur only if the supply voltage V

threshold voltage (1

cc

under the recommended

minimum supply voltage can destroy the content of the memory and registers and yet not activate the reset

circuit. This may have catastrophic consequences.

The following program example (8080 assembler code) tests an input:

WAIT

LXI

B,INPUT

;load address

LOOP

LDAX

B

;read input

ANI

MASK

;mask bit

JNZ

LOOP

;test

If, during the execution of the loop, the content of the B/C register is affected by a short voltage drop

(causing an incorrect input to be read), an incorrect condition will be tested and an incorrect decision will

be the consequence. Alternatively the addressed input will show a value which can never give a positive

test result: the execution of the program seems to be stopped.