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ATTINY2313 Datasheet(PDF) 32 Page - ATMEL Corporation

Part No. ATTINY2313
Description  8-bit AVR Microcontroller with 2K Bytes In-System Programmable Flash
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Maker  ATMEL [ATMEL Corporation]
Homepage  http://www.atmel.com
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32
ATtiny2313/V
2543C–AVR–12/03
Minimizing Power
Consumption
There are several issues to consider when trying to minimize the power consumption in
an AVR controlled system. In general, sleep modes should be used as much as possi-
ble, and the sleep mode should be selected so that as few as possible of the device’s
functions are operating. All functions not needed should be disabled. In particular, the
following modules may need special consideration when trying to achieve the lowest
possible power consumption.
Analog Comparator
When entering Idle mode, the Analog Comparator should be disabled if not used. In
other sleep modes, the Analog Comparator is automatically disabled. However, if the
Analog Comparator is set up to use the Internal Voltage Reference as input, the Analog
Comparator should be disabled in all sleep modes. Otherwise, the Internal Voltage Ref-
erence will be enabled, independent of sleep mode. Refer to “Analog Comparator” on
page 150 for details on how to configure the Analog Comparator.
Brown-out Detector
If the Brown-out Detector is not needed by the application, this module should be turned
off. If the Brown-out Detector is enabled by the BODLEVEL Fuses, it will be enabled in
all sleep modes, and hence, always consume power. In the deeper sleep modes, this
will contribute significantly to the total current consumption. Refer to “Brown-out Detec-
tion” on page 35 for details on how to configure the Brown-out Detector.
Internal Voltage Reference
The Internal Voltage Reference will be enabled when needed by the Brown-out Detec-
tion or the Analog Comparator. If these modules are disabled as described in the
sections above, the internal voltage reference will be disabled and it will not be consum-
ing power. When turned on again, the user must allow the reference to start up before
the output is used. If the reference is kept on in sleep mode, the output can be used
immediately. Refer to “Internal Voltage Reference” on page 38 for details on the start-up
time.
Watchdog Timer
If the Watchdog Timer is not needed in the application, the module should be turned off.
If the Watchdog Timer is enabled, it will be enabled in all sleep modes, and hence,
always consume power. In the deeper sleep modes, this will contribute significantly to
the total current consumption. Refer to “Interrupts” on page 44 for details on how to con-
figure the Watchdog Timer.
Port Pins
When entering a sleep mode, all port pins should be configured to use minimum power.
The most important is then to ensure that no pins drive resistive loads. In sleep modes
where the I/O clock (clk
I/O) is stopped, the input buffers of the device will be disabled.
This ensures that no power is consumed by the input logic when not needed. In some
cases, the input logic is needed for detecting wake-up conditions, and it will then be
enabled. Refer to the section “Digital Input Enable and Sleep Modes” on page 50 for
details on which pins are enabled. If the input buffer is enabled and the input signal is
left floating or have an analog signal level close to V
CC/2, the input buffer will use exces-
sive power.
For analog input pins, the digital input buffer should be disabled at all times. An analog
signal level close to V
CC/2 on an input pin can cause significant current even in active
mode. Digital input buffers can be disabled by writing to the Digital Input Disable Regis-
ters (DIDR). Refer to “Digital Input Disable Register – DIDR” on page 151.




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