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IP4788CZ32 Datasheet(PDF) 25 Page - NXP Semiconductors |
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IP4788CZ32 Datasheet(HTML) 25 Page - NXP Semiconductors |
25 / 33 page IP4788CZ32 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved. IP4788CZ32 Rev. 2 — 24 November 2014 25 of 33 NXP Semiconductors IP4788CZ32 DVI and HDMI interface ESD and overcurrent protection 9.11 Typical application The IP4788CZ32 is designed to simplify routing to the HDMI connector and to ease the incorporation of high-level ESD protection into delicately balanced high-speed TMDS lines. These lines rely on tightly controlled microstrip or stripline transmission lines with minimal impedance discontinuities. They can deteriorate return loss, increase deterministic jitter and generally erode overall link signal integrity. Normally when designing the PCB with standard shunt ESD clamps, careful consideration must be given to manual pre-compensation of the additional load of the added ESD component. With the IP4788CZ32 TLCs, the ESD suppressor is designed to maintain the characteristic impedance of the PCB microstrip or stripline. Therefore the designer needs only to be concerned with the standard-controlled impedance of the unloaded PCB lines. This feature simplifies the task of the PCB designer, and minimizes the tuning cycles, which are sometimes required when pre-compensation misses the mark. A basic application diagram for the ESD protection of an HDMI interface is shown in Figure 24 for a type-A HDMI connector. The optimized DFN5050-32 pinning simplifies the PCB design to keep the ESD protection close to the connector where it can minimize the coupling of the ESD pulse onto other lines in the system during a strike. Due to the integrated pull-up and pull-down resistors, only two external capacitors are required to implement a fully compliant HDMI port. Fig 24. Application of the IP4788CZ32 showing optimized single-layer HDMI type-A connector routing 001aan367 |
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