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S3C4530A Datasheet(PDF) 24 Page - Samsung semiconductor |
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S3C4530A Datasheet(HTML) 24 Page - Samsung semiconductor |
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PRODUCT OVERVIEW S3C4530A 1-24 Table 1-5. S3C4530A Special Registers (Continued) Group Registers Offset R/W Description Reset/Value Ethernet STADATA 0xA018 R/W Station management data 0x00000000 (MAC) STACON 0xA01C R/W Station management control and address 0x00006000 CAMEN 0xA028 R/W CAM enable register 0x00000000 EMISSCNT 0xA03C R/W Missed error count register 0x00000000 EPZCNT 0xA040 R Pause count register 0x00000000 ERMPZCNT 0xA044 R Remote pause count register 0x00000000 ETXSTAT 0x9040 R Transmit control frame status 0x00000000 HDLC HMODE 0x7000 R/W HDLC mode register 0x00000000 Channel A HCON 0x7004 R/W HDLC control register 0x00000000 HSTAT 0x7008 R/W HDLC status register 0x00010400 HINTEN 0x700C R/W HDLC interrupt enable register 0x00000000 HTXFIFOC 0x7010 W TxFIFO frame continue register - HTXFIFOT 0x7014 W TxFIFO frame terminate register - HRXFIFO 0x7018 R HDLC RxFIFO entry register 0x00000000 HBRGTC 0x701C R/W HDLC baud rate generate time constant 0x00000000 HPRMB 0x7020 R/W HDLC preamble constant 0x00000000 HSAR0 0x7024 R/W HDLC station address 0 0x00000000 HSAR1 0x7028 R/W HDLC station address 1 0x00000000 HSAR2 0x702C R/W HDLC station address 2 0x00000000 HSAR3 0x7030 R/W HDLC station address 3 0x00000000 HMASK 0x7034 R/W HDLC mask register 0x00000000 HDMATxPTR 0x7038 R/W DMA Tx buffer descriptor pointer 0x00000000 HDMARxPTR 0x703C R/W DMA Rx buffer descriptor pointer 0x00000000 HMFLR 0x7040 R/W Maximum frame length register 0x00000000 HRBSR 0x7040 R/W DMA receive buffer size register 0x00000000 HSYNC 0x7048 R/W HDLC Sync Register 0x7E TCON 0x704C R/W Transparent Control Register 0x00000000 HDLC HMODE 0x8000 R/W HDLC mode register 0x00000000 Channel B HCON 0x8004 R/W HDLC control register 0x00000000 HSTAT 0x8008 R/W HDLC status register 0x00010400 HINTEN 0x800C R/W HDLC interrupt enable register 0x00000000 HTXFIFOC 0x8010 W TxFIFO frame continue register 0x00000000 HTXFIFOT 0x8014 W TxFIFO frame terminate register 0x00000000 HRXFIFO 0x8018 R HDLC RxFIFO entry register 0x00000000 HBRGTC 0x801C R/W HDLC baud rate generate time constant 0x00000000 HPRMB 0x8020 R/W HDLC preamble constant 0x00000000 |
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