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S3C4530A Datasheet(PDF) 14 Page - Samsung semiconductor

Part No. S3C4530A
Description  16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller
Download  432 Pages
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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S3C4530A Datasheet(HTML) 14 Page - Samsung semiconductor

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PRODUCT OVERVIEW
S3C4530A
1-14
Table 1-2. S3C4530A Pin List and PAD Type
Group
Pin Name
Pin Counts
I/O Type
Pad Type
Description
System
XCLK
1
I
ptic
S3C4530A system source clock.
Configuration MCLKO
1
O
pob4
System clock out.
(8)
CLKSEL
1
I
ptic
Clock select.
nRESET
1
I
ptis
Not reset.
CLKOEN
1
I
ptic
Clock out enable/disable.
TMODE
1
I
ptic
Test mode.
LITTLE
1
I
pticd
Little endian mode select pin
FILTER
1
I
pia_bb
PLL filter pin
TAP Control
TCK
1
I
ptic
JTAG test clock.
(5)
TMS
1
I
pticu
JTAG test mode select.
TDI
1
I
pticu
JTAG test data in.
TDO
1
O
ptot2
JTAG test data out.
nTRST
1
I
pticu
JTAG not reset.
Memory
ADDR[21:0]
22
O
ptot6
Address bus.
Interface
XDATA[31:0]
32
I/O
ptbsut6
External, bi-directional, 32-bit data bus.
(83)
nRAS[3:0]
4
O
ptot4
Not row address strobe for DRAM.
nCAS[3:0]
4
O
ptot4
Not column address strobe for DRAM.
nDWE
1
O
ptot4
Not write enable for DRAM.
nECS[3:0]
4
O
ptot4
Not external I/O chip select.
nEWAIT
1
I
ptic
Not external wait signal.
nRCS[5:0]
6
O
ptot4
Not ROM/SRAM/flash chip select.
B0SIZE[1:0]
2
I
ptic
Bank 0 data bus access size.
nOE
1
O
ptot4
Not output enable.
nWBE[3:0]
4
O
ptot4
Not write byte enable.
ExtMREQ
1
I
ptic
External master bus request.
ExtMACK
1
O
pob1
External bus acknowledge.


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