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S3C4530A Datasheet(PDF) 11 Page - Samsung semiconductor

Part No. S3C4530A
Description  16/32-bit RISC microcontroller is a cost-effective, high-performance microcontroller
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Maker  SAMSUNG [Samsung semiconductor]
Homepage  http://www.samsung.com/Products/Semiconductor
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S3C4530A Datasheet(HTML) 11 Page - Samsung semiconductor

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S3C4530A
PRODUCT OVERVIEW
1-11
Table 1-1. S3C4530A Signal Descriptions (Continued)
Signal
Pin No.
Type
Description
RXCA
14
I
HDLC Ch-A Receiver Clock. When this clock input is used as the
receiver clock, the receiver samples the data on the positive
edge of RXCA clock. It is possible to samples the data on the
negative edge by register setting. This clock can be the source
clock of the receiver, the baud rate generator, or the DPLL.
TXCA
16
I/O
HDLC Ch-A Transmitter Clock. When this clock input is used as
the transmitter clock, the transmitter shifts data on the negative
transition of the TXCA clock . It is possible to samples the data
on the positive edge by register setting. If you do not use TXCA
as the transmitter clock, you can use it as an output pin for
monitoring internal clocks such as the transmitter clock, receiver
clock, and baud rate generator output clocks.
TXDB
20
O
HDLC Ch-B Transmit Data. See the TXDA pin description.
RXDB
18
I
HDLC Ch-B Receive Data. See the RXDA pin description.
nDTRB
17
O
HDLC Ch-B Data Terminal Ready. See the nDTRA pin
description.
nRTSB
19
O
HDLC Ch-B Request To Send. See the nRTSA pin description.
nCTSB
23
I
HDLC Ch-B Clear To Send. See the nCTSA pin description.
nDCDB
24
I
HDLC Ch-B Data Carrier Detected. See the nDCDA pin
description.
nSYNCB
26
O
HDLC Ch-B Sync is detected. See the nSYNCA pin description.
RXCB
25
I
HDLC Ch-B Receiver Clock. See the RXCA pin description.
TXCB
27
I/O
HDLC Ch-B Transmitter Clock. See the TXCA pin description.
UCLK
64
I
The external UART clock input. MCLK or PLL generated clock
can be used as the UART clock. You can use UCLK, with an
appropriate divided by factor, if a very precious baud rate clock is
required.
UARXD0/P[18]
202
I/B
UART0 Receive Data. RXD0 is the UART0 input signal for
receiving serial data. This pin can be used general I/O port also.
It can be controlled by IOPCON register. See chapter 12.
UATXD0/P[20]
204
O/B
UART0 Transmit Data. TXD0 is the UART0 output signal for
transmitting serial data. This pin can be used general I/O port
also. It can be controlled by IOPCON register. See chapter 12.
nUADSR0/P[19]
203
I/B
Not UART0 Data Set Ready. This input signals in the UART0 that
the peripheral (or host) is ready to transmit or receive serial data.
See chapter 10.
nUADTR0/P[21]
205
O/B
Not UART0 Data Terminal Ready. This output signals the host
(or peripheral) that UART0 is ready to transmit or receive serial
data. This pin output state can be controlled by UART0 control
register.


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