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S3C4530A Datasheet(PDF) 94 Page - Samsung semiconductor |
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S3C4530A Datasheet(HTML) 94 Page - Samsung semiconductor |
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94 / 432 page 
INSTRUCTION SET S3C4530A 3-52 INSTRUCTION CYCLE TIMES Coprocessor data operations take 1S + bI incremental cycles to execute, where b is the number of cycles spent in the coprocessor busy-wait loop. S and I are defined as sequential (S-cycle) and internal (I-cycle). ASSEMBLER SYNTAX CDP{cond} p#,<expression1>,cd,cn,cm{,<expression2>} { cond} Two character condition mnemonic. See Table 3-2. p# The unique number of the required coprocessor <expression1> Evaluated to a constant and placed in the CP Opc field cd, cn and cm Evaluate to the valid coprocessor register numbers CRd, CRn and CRm respectively <expression2> Where present is evaluated to a constant and placed in the CP field Examples CDP p1,10,c1,c2,c3 ; Request coproc 1 to do operation 10 ; on CR2 and CR3, and put the result in CR1. CDPEQ p2,5,c1,c2,c3,2 ; If Z flag is set request coproc 2 to do operation 5 (type 2) ; on CR2 and CR3, and put the result in CR1. |
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