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S3C4530A Datasheet(PDF) 44 Page - Samsung semiconductor |
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S3C4530A Datasheet(HTML) 44 Page - Samsung semiconductor |
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INSTRUCTION SET S3C4530A 3-2 INSTRUCTION SUMMARY Table 3-1. The ARM Instruction Set Mnemonic Instruction Action ADC Add with carry Rd: = Rn + Op2 + Carry ADD Add Rd: = Rn + Op2 AND AND Rd: = Rn AND Op2 B Branch R15: = address BIC Bit clear Rd: = Rn AND NOT Op2 BL Branch with link R14: = R15, R15: = address BX Branch and exchange R15: = Rn, T bit: = Rn[0] CDP Coprocessor data processing (coprocessor-specific) CMN Compare negative CPSR flags: = Rn + Op2 CMP Compare CPSR flags: = Rn - Op2 EOR Exclusive OR Rd: = (Rn AND NOT Op2) OR (op2 AND NOT Rn) LDC Load coprocessor from memory Coprocessor load LDM Load multiple registers Stack manipulation (Pop) LDR Load register from memory Rd: = (address) MCR Move CPU register to coprocessor register cRn: = rRn {<op>cRm} MLA Multiply accumulate Rd: = (Rm * Rs) + Rn MOV Move register or constant Rd: = Op2 MRC Move from coprocessor register to CPU register Rn: = cRn {<op>cRm} MRS Move PSR status/flags to register Rn: = PSR MSR Move register to PSR status/flags PSR: = Rm MUL Multiply Rd: = Rm * Rs MVN Move negative register Rd: = 0xFFFFFFFF EOR Op2 |
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