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DRV10963 Datasheet(PDF) 11 Page - Texas Instruments

Part No. DRV10963
Description  DRV10963 5-V, Three-Phase, Sensorless BLDC Motor Driver
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DRV10963 Datasheet(HTML) 11 Page - Texas Instruments

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DRV10963
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SLAS955A – MARCH 2013 – REVISED JULY 2015
Table 3. Motor Handoff Speed Threshold Options
MAXIMUM SPEED (Hz)
HOffth (Hz)
HO_TH [3:0]
<100
12.5
1
100 to approximately 150
25
2
150 to approximately 200
37.5
3
200 to approximately 250
50
4
250 to approximately 300
62.5
5
300 to approximately 350
75
6
350 to approximately 400
87.5
7
400 to approximately 450
100
8
450 to approximately 500
112.5
9
500 to approximately 560
125
A
560 to approximately 620
137.5
B
620 to approximately 700
150
C
700 to approximately 800
162.5
D
800 to approximately 900
175
E
>900
187.5
F
The selection of align time (TAlign) and accelerate rate (RAcc) can also be determined by experimental testing.
Motors with higher inertia typically require a longer align time and slower accelerate rate while motors with low
inertia typically require a shorter align time and a faster accelerate rate. System tradeoffs should be done to
optimize start up reliability versus spin up time. TI recommends starting with choosing the less aggressive
settings (slow RAcc and large TAlign) to sacrifice the spin up time in favor of highest success rate. Once the
system is verified to work reliably the more aggressive settings (higher RAcc and smaller TAlign) can be used to
decrease the spin up time while carefully monitoring the success rate.
Table 4 shows the configurable settings for TAlign and RAcc.
Table 4. Motor Alignment and Accelerate Options
TAlign (ms)
RAcc (Hz/s)
TARA_TH[3:0]
40
150
1
80
140
2
120
130
3
160
120
4
200
110
5
240
100
6
280
90
7
320
80
8
360
70
9
400
60
A
440
50
B
480
40
C
520
30
D
560
20
E
600
10
F
7.3.3 Motor Direction Change
The DRV10963 can be easily configured to drive the motor in either direction by setting the input on the FR
(Forward Reverse) pin to a logic 1 or logic 0 state. The direction of commutation as described by the
commutation sequence is illustrated in Table 5.
Copyright © 2013–2015, Texas Instruments Incorporated
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