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MAX97220A Datasheet(PDF) 15 Page - Maxim Integrated Products
MAXIM [Maxim Integrated Products]
MAX97220A Datasheet(HTML) 15 Page - Maxim Integrated Products
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Differential Input DirectDrive
Line Drivers/Headphone Amplifiers
Thermal-overload protection limits total power dissipa-
tion in the IC. When the junction temperature exceeds
+160NC, the thermal protection circuitry disables the
amplifier. Operation returns to normal once the die cools
Charge-Pump Capacitor Selection
Use capacitors with an ESR less than 100mI for opti-
mum performance. Low-ESR ceramic capacitors mini-
mize the output resistance of the charge pump. For best
performance over the extended temperature range,
select capacitors with an X7R dielectric.
Flying Capacitor (C1)
The value of the flying capacitor (C1) affects the charge
pump’s load regulation and output resistance. A C1
value that is too small degrades the device’s ability to
provide sufficient current drive, which leads to a loss of
output voltage. Increasing the value of C1 improves load
regulation and reduces the charge-pump output resis-
tance to an extent. Above 1FF, the on-resistance of the
switches and the ESR of C1 and C2 dominate.
Hold Capacitor (C2)
The hold capacitor value and ESR directly affect the
ripple at PVSS. Use a low-ESR 1FF capacitor for C2.
The gain of the MAX97220C/MAX97220D is internally
set at 6dB where all gain-setting resistors are integrated
into the device. The internally set gain, in combination
with DirectDrive, results in a headphone amplifier that
requires only tiny 1FF capacitors to complete the ampli-
The gain of the MAX97220A/MAX97220B/MAX97220E
amplifier is set externally as shown in Figure 5. The gain is:
Choose feedback resistor values between the 4.7kI
and 100kI range.
Proper power-supply bypassing ensures low-noise, low-
distortion performance. Connect a 1FF ceramic capaci-
tor from PVDD to PGND and a 1FF ceramic capacitor
from SVDD to PGND. Add additional bulk capacitance
as required by the application. Locate the bypass
capacitor as close as possible to the device.
PCB Layout and Grounding
Good PCB layout is essential for optimizing performance.
Use large traces for the power-supply inputs and ampli-
fier outputs to minimize losses due to parasitic trace
resistance and route heat away from the device. Good
grounding improves audio performance, and prevents
any digital switching noise from coupling into the audio.
Connect PGND and SGND together at a single point
on the PCB. Connect all components associated with
the charge pump (C1 and C2) to the PGND plane.
Connect PVDD and SVDD together at the device. Place
capacitors C1 and C2 as close as possible to the device.
Ensure the PCB layout is partisioned so that the large
switching currents in the ground plane do not return
through SGND and the traces and components in the
audio signal path. Refer to the MAX97220 Evaluation Kit
for layout guidelines.
The IC is inherently designed for excellent RF immunity.
For best performance, add ground fills around all signal
traces on top or bottom PCB planes. Also, ensure a solid
ground plane is used in multilayer PCB designs.
Figure 5. Setting the MAX97220A/MAX97220B/MAX97220E Gain
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