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ISL68201 Datasheet(PDF) 6 Page - Intersil Corporation

Part # ISL68201
Description  Single-Phase R4 Digital Hybrid PWM Controller
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Manufacturer  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

ISL68201 Datasheet(HTML) 6 Page - Intersil Corporation

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ISL68201
6
FN8696.1
March 7, 2016
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12
CSEN
This pin monitors the positive flow of output current with a series resistor and for overcurrent protection and telemetry. The
series resistor sets the current gain and should be within 40Ω
and 3.5kΩ.
13
NTC
Input pin for the temperature measurement. Connect this pin through an NTC thermistor (10kΩ,
 ~ 3380) and a decoupling
capacitor (~0.1μF) to GND and a resistor (1.54kΩ)
to VCC of the controller. The voltage at this pin is inversely proportional to
the VR temperature.
14
IOUT
Output current monitor pin. An external resistor sets the gain and an external capacitor provides the averaging function; an
external pull-up resistor to VCC is recommended to calibrate the no load offset. See “IOUT Calibration” on page 19
.
15
PROG4
Programming pin for Modulator (R4™) RR impedance and output slew rate during Soft-Start (SS) and Dynamic VID (DVID).
It also sets AV gain multiplier to 1x or 2x and determines the AV gain on PROG3.
16
PROG3
Programming pin for ultrasonic PFM operation, fault behavior, switching frequency and R4 (AV) control loop gain.
17
PROG2
Programming pin for PWM/PFM mode, temperature compensation and Serial Bus (SMBus/PMBus/I2C) address.
18
PROG1
Programming pin for boot-up voltage.
19, 21
GND
Ground pin, connect directly to system ground plane.
20
FCCM
Output signal low to work with DrMOS ISL99140 for diode emulation in PFM mode; signal high for PWM mode.
22
PWM
PWM output and is compatible with 3.3V or 5V PWM input external driver, DrMOS or Smart Power Stage.
23
PVCC
Output of the 5V LDO and input for the LGATE and UGATE MOSFET driver circuits. Place a high quality low ESR ceramic
capacitors (4.7μF or higher, X7R) in close proximity to the pin.
24
LGIN
Low-side gate signal input to complete the internal FLL loop. A 100Ω series impedance from low-side gate drive signal to
this pin is recommended.
PAD
GND
Return of logic bias supply VCC. Connect directly to system ground plane with at least 4 vias.
Functional Pin Descriptions (Continued)
PIN NUMBER
SYMBOL
DESCRIPTION


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