HS-4424RH, HS-4424EH, HS-4424BRH, HS-4424BEH

3

Intersil products are manufactured, assembled and tested utilizing ISO9000 quality systems as noted

in the quality certifications found at www.intersil.com/en/support/qualandreliability.html

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time

without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be

accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third

parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN4739.2

September 24, 2013

For additional products, see www.intersil.com/en/products.html

Die Characteristics

DIE DIMENSIONS:

4890

μm x 3370μm (193 mils x 133 mils)

Thickness: 483

μm ± 25.4μm (19 mils ± 1 mil)

INTERFACE MATERIALS:

Glassivation:

Type: PSG (Phosphorous Silicon Glass)

Thickness: 8.0kÅ

± 1.0kÅ

Top Metallization:

Type: AlSiCu

Thickness: 16.0kÅ

± 2kÅ

Substrate:

Radiation Hardened Silicon Gate,

Dielectric Isolation

Backside Finish:

Silicon

ASSEMBLY RELATED INFORMATION:

Substrate Potential:

Unbiased (DI)

ADDITIONAL INFORMATION:

Worst Case Current Density:

Transistor Count:

125

Metallization Mask Layout

HS-4424RH, HS-4424EH, HS-4424BRH, HS-4424BEH

GND (5)

IN B (7)

OUT B (10)

OUT B (11)

GND (4)

IN A (2)

OUT A (15)

OUT A (14)