Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

AT90S4433 Datasheet(PDF) 69 Page - ATMEL Corporation

Part No. AT90S4433
Description  8-Bit AVR Microcontroller with 4K Bytes of In-System Programmable Flash
Download  126 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90S4433 Datasheet(HTML) 69 Page - ATMEL Corporation

Back Button AT90S4433 Datasheet HTML 65Page - ATMEL Corporation AT90S4433 Datasheet HTML 66Page - ATMEL Corporation AT90S4433 Datasheet HTML 67Page - ATMEL Corporation AT90S4433 Datasheet HTML 68Page - ATMEL Corporation AT90S4433 Datasheet HTML 69Page - ATMEL Corporation AT90S4433 Datasheet HTML 70Page - ATMEL Corporation AT90S4433 Datasheet HTML 71Page - ATMEL Corporation AT90S4433 Datasheet HTML 72Page - ATMEL Corporation AT90S4433 Datasheet HTML 73Page - ATMEL Corporation Next Button
Zoom Inzoom in Zoom Outzoom out
 69 / 126 page
background image
69
AT90S/LS4433
1042H–AVR–04/03
• Bit 5 – ADFR: ADC Free Run Select
When this bit is set (one), the ADC operates in Free Run mode. In this mode, the ADC
samples and updates the Data Registers continuously. Clearing this bit (zero) will termi-
nate Free Run mode.
• Bit 4 – ADIF: ADC Interrupt Flag
This bit is set (one) when an ADC conversion completes and the Data Registers are
updated. The ADC Conversion Complete interrupt is executed if the ADIE bit and the I-
bit in SREG are set (one). ADIF is cleared by hardware when executing the correspond-
ing interrupt handling vector. Alternatively, ADIF is cleared by writing a logical “1” to the
flag. Beware that if doing a Read-Modify-Write on ADCSR, a pending interrupt can be
disabled. This also applies if the SBI and CBI instructions are used.
• Bit 3 – ADIE: ADC Interrupt Enable
When this bit is set (one) and the I-bit in SREG is set (one), the ADC Conversion Com-
plete interrupt is activated.
• Bits 2..0 – ADPS2..ADPS0: ADC Prescaler Select Bits
These bits determine the division factor between the XTAL frequency and the input
clock to the ADC.
ADC Data Register – ADCL
AND ADCH
When an ADC conversion is complete, the result is found in these two registers. In Free
Run mode, it is essential that both registers are read and that ADCL is read before
ADCH.
Table 22. ADC Prescaler Selections
ADPS2
ADPS1
ADPS0
Division Factor
00
0
2
00
1
2
01
0
4
01
1
8
10
0
16
10
1
32
11
0
64
1
1
1
128
Bit
151413121110
9
8
$05 ($25)
––––
––
ADC9
ADC8
ADCH
$04 ($26)
ADC7
ADC6
ADC5
ADC4
ADC3
ADC2
ADC1
ADC0
ADCL
7654
321
0
Read/Write
R
RRRR
RRR
R
RRRR
RRR
Initial Value
0000
000
0
0000
000
0


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49  50  51  52  53  54  55  56  57  58  59  60  61  62  63  64  65  66  67  68  69  70  71  72  73  74  75  76  77  78  79  80  81  82  83  84  85  86  87  88  89  90  91  92  93  94  95  96  97  98  99  100   ...More


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn