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AT90S4433 Datasheet(PDF) 21 Page - ATMEL Corporation

Part No. AT90S4433
Description  8-Bit AVR Microcontroller with 4K Bytes of In-System Programmable Flash
Download  126 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT90S4433 Datasheet(HTML) 21 Page - ATMEL Corporation

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21
AT90S/LS4433
1042H–AVR–04/03
The most typical program setup for the Reset and Interrupt Vector addresses are:
Address
Labels
Code
Comments
$000
rjmp
RESET
; Reset Handler
$001
rjmp
EXT_INT0
; IRQ0 Handler
$002
rjmp
EXT_INT1
; IRQ1 Handler
$003
rjmp
TIM1_CAPT
; Timer1 Capture Handler
$004
rjmp
TIM1_COMP
; Timer1 compare Handler
$005
rjmp
TIM1_OVF
; Timer1 Overflow Handler
$006
rjmp
TIM0_OVF
; Timer0 Overflow Handler
$007
rjmp
SPI_STC;
; SPI Transfer Complete Handler
$008
rjmp
UART_RXC
; UART RX Complete Handler
$009
rjmp
UART_DRE
; UDR Empty Handler
$00a
rjmp
UART_TXC
; UART TX Complete Handler
$00b
rjmp
ADC
; ADC Conversion Complete Interrupt Handler
$00c
rjmp
EE_RDY
; EEPROM Ready Handler
$00d
rjmp
ANA_COMP
; Analog Comparator Handler
;
$00e
MAIN:
ldi
r16,low(RAMEND); Main program start
$00f
out
SP,r16;
$010
<instr>
xxx
;
Reset Sources
The AT90S4433 has four sources of reset:
Power-on Reset. The MCU is reset when the supply voltage is below the Power-on
Reset threshold (V
POT).
External Reset. The MCU is reset when a low level is present on the RESET pin for
more than 50 ns.
Watchdog Reset. The MCU is reset when the Watchdog Timer period expires and
the Watchdog is enabled.
Brown-out Reset. The MCU is reset when the supply voltage (V
CC) falls below a
certain voltage.
During Reset, all I/O Registers are then set to their Initial Values, and the program starts
execution from address $000. The instruction placed in address $000 must be an RJMP
(relative jump) instruction to the reset handling routine. If the program never enables an
interrupt source, the Interrupt Vectors are not used, and regular program code can be
placed at these locations. The circuit diagram in Figure 24 shows the Reset Logic. Table
4 and Table 5 define the timing and electrical parameters of the reset circuitry.


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