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OR2C26A Datasheet(PDF) 62 Page - Lattice Semiconductor |
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OR2C26A Datasheet(HTML) 62 Page - Lattice Semiconductor |
62 / 192 page 62 Lattice Semiconductor Data Sheet ORCA Series 2 FPGAs January 2002 Estimating Power Dissipation (continued) OR2C06A Clock Power P= [0.63 mW/MHz + (0.25 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C06A clock power ≈ 5.3 mW/MHz. OR2C08A Clock Power P= [0.65 mW/MHz + (0.29 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C08A clock power ≈ 6.6 mW/MHz. OR2C10A Clock Power P= [0.66 mW/MHz + (0.32 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C10A clock power ≈ 8.6 mW/MHz. OR2C12A Clock Power P= [0.68 mW/MHz + (0.35 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C12A clock power ≈ 10.5 mW/MHz. OR2C15A Clock Power P= [0.69 mW/MHz + (0.38 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C15A clock power ≈ 12.7 mW/MHz. OR2C26A Clock Power P= [0.73 mW/MHz + (0.44 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C26A clock power ≈ 17.8 mW/MHz. OR2C40A Clock Power P= [0.77 mW/MHz + (0.53 mW/MHz – Branch) (# Branches) + (0.022 mW/MHz – PFU) (# PFUs) + (0.006 mW/MHz – SMEM_PFU) (# SMEM_PFUs)] fCLK For a quick estimate, the worst-case (typical circuit) OR2C40A clock power ≈ 26.6 mW/MHz. The power dissipated in a PIC is the sum of the power dissipated in the four I/Os in the PIC. This consists of power dissipated by inputs and ac power dissipated by outputs. The power dissipated in each I/O depends on whether it is configured as an input, output, or input/ output. If an I/O is operating as an output, then there is a power dissipation component for PIN, as well as POUT. This is because the output feeds back to the input. The power dissipated by a TTL input buffer is estimated as: PTTL = 2.2 mW + 0.17 mW/MHz The power dissipated by an input buffer is estimated as: PCMOS = 0.17 mW/MHz The ac power dissipation from an output or bidirec- tional is estimated by the following: POUT = (CL + 8.8 pF) x VDD2 x F Watts where the unit for CL is farads, and the unit for F is Hz. As an example of estimating power dissipation, suppose that a fully utilized OR2C15A has an average of three outputs for each of the 400 PFUs, that all 20 clock branches are used, that 150 of the 400 PFUs have FFs clocked at 40 MHz (16 of which are operating in a synchronous memory mode), and that the PFU outputs have an average activity factor of 20%. Twenty TTL-configured inputs, 20 CMOS-configured inputs, 32 outputs driving 30 pF loads, and 16 bidirec- tional I/Os driving 50 pF loads are also generated from the 40 MHz clock with an average activity factor of 20%. The worst-case (VDD = 5.25 V) power dissipation is estimated as follows: PPFU = 400 x 3 (0.16 mW/MHz x 20 MHz x 20%) = 768 mW |
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