OBSOLETE

LM6121

LM6221, LM6321

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SNOSC10C – MAY 1998 – REVISED APRIL 2013

Application Hints

POWER SUPPLY DECOUPLING

The method of supply bypassing is not critical for stability of the LM6121 series buffers. However, their high

current output combined with high slew rate can result in significant voltage transients on the power supply lines

if much inductance is present. For example, a slew rate of 900 V/

μs into a 50Ω load produces a di/dt of 18 A/μs.

Multiplying this by a wiring inductance of 50 nH (which corresponds to approximately 1½

″ of 22 gauge wire)

result in a 0.9V transient. To minimize this problem use high quality decoupling very close to the device.

Suggested values are a 0.1

μF ceramic in parallel with one or two 2.2 μF tantalums. A ground plane is

recommended.

LOAD IMPEDANCE

The LM6121 is stable to any load when driven by a 50

Ω source. As shown in the Overshoot vs Capacitive Load

graph, worst case is a purely capacitive load of about 1000 pF. Shunting the load capacitance with a resistor will

reduce overshoot.

SOURCE INDUCTANCE

Like any high frequency buffer, the LM6121 can oscillate at high values of source inductance. The worst case

condition occurs at a purely capacitive load of 50 pF where up to 100 nH of source inductance can be tolerated.

With a 50

Ω load, this goes up to 200 nH. This sensitivity may be reduced at the expense of a slight reduction in

bandwidth by adding a resistor in series with the buffer input. A 100

Ω resistor will ensure stability with source

inductances up to 400 nH with any load.

OVERVOLTAGE PROTECTION

The LM6121 may be severely damaged or destroyed if the Absolute Maximum Rating of 7V between input and

output pins is exceeded.

If the buffer's input-to-output differential voltage is allowed to exceed 7V, a base-emitter junction will be in

reverse-breakdown, and will be in series with a forward-biased base-emitter junction. Referring to the LM6121

simplified schematic, the transistors involved are Q1 and Q3 for positive inputs, and Q2 and Q4 for negative

inputs. If any current is allowed to flow through these junctions, localized heating of the reverse-biased junction

will occur, potentially causing damage. The effect of the damage is typically increased offset voltage, increased

bias current, and/or degraded AC performance. Furthermore, this will defeat the short-circuit and over-

temperature protection circuitry. Exceeding ±7V input with a shorted output will destroy the device.

The device is best protected by the insertion of the parallel combination of a 100 k

Ω resistor (R1) and a small

capacitor (C1) in series with the buffer input, and a 100 k

Ω resistor (R2) from input to output of the buffer (see

Figure 14). This network normally has no effect on the buffer output. However, if the buffer's current limit or

shutdown is activated, and the output has a ground-referred load of significantly less than 100 k

Ω, a large input-

to-output voltage may be present. R1 and R2 then form a voltage divider, keeping the input-output differential

below the 7V Maximum Rating for input voltages up to 14V. This protection network should be sufficient to

protect the LM6121 from the output of nearly any op amp which is operated on supply voltages of ±15V or lower.

Figure 14. LM6121 with Overvoltage Protection

HEATSINK REQUIREMENTS

A heatsink may be required with the LM6321 depending on the maximum power dissipation and maximum

ambient temperature of the application. Under all possible operating conditions, the junction temperature must be

within the range specified under Absolute Maximum Ratings.

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