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TDA5102 Datasheet(PDF) 10 Page - Infineon Technologies AG |
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TDA5102 Datasheet(HTML) 10 Page - Infineon Technologies AG |
10 / 35 page Functional Description 3 - 3 TDA 5102 Wireless Components Specification, October 2001 3.2 Pin Definitions and Functions Table 3-2 Pin No. Symbol Interface Schematic Function 1 PDWN Disable pin for the complete transmitter cir- cuit. A logic low (PDWN < 0.7 V) turns off all transmitter functions. A logic high (PDWN > 1.5 V) gives access to all transmitter functions. PDWN input will be pulled up by 40 µA inter- nally by either setting FSKDTA or ASKDTA to a logic high-state. 2 LPD This pin provides an output indicating the low-voltage state of the supply voltage VS. VS < 2.15 V will set LPD to the low-state. An internal pull-up current of 40 µA gives the output a high-state at supply voltages above 2.15 V. 3 VS This pin is the positive supply of the trans- mitter electronics. An RF bypass capacitor should be con- nected directly to this pin and returned to GND (pin 5) as short as possible. 1 V S 150 k Ω 5 k Ω 250 k Ω "ON" 40 µA ∗ (ASKDTA+FSKDTA) V S 300 Ω 2 40 µA |
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