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RM46L430CZWTT Datasheet(PDF) 10 Page - Texas Instruments |
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RM46L430CZWTT Datasheet(HTML) 10 Page - Texas Instruments |
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10 / 179 page  RM46L430, RM46L830 SPNS182C – SEPTEMBER 2012 – REVISED JUNE 2015 www.ti.com 4.3 Terminal Functions Section 4.3.1 and Section 4.3.2 identify the external signal names, the associated pin/ball numbers along with the mechanical package designator, the pin/ball type (Input, Output, IO, Power or Ground), whether the pin/ball has any internal pullup/pulldown, whether the pin/ball can be configured as a GPIO, and a functional pin/ball description. The first signal name listed is the primary function for that terminal. The signal name in Bold is the function being described. Refer to the I/O Multiplexing Module (IOMM) chapter of the RM46x Technical Reference Manual (SPNU514). NOTE In the Terminal Functions table below, the "Reset Pull State" is the state of the pull applied to the terminal while nPORRST is low and immediately after nPORRST goes High. The default pull direction may change when software configures the pin for an alternate function. The "Pull Type" is the type of pull asserted when the signal name in bold is enabled for the given terminal by the IOMM control registers. All I/O signals except nRST are configured as inputs while nPORRST is low and immediately after nPORRST goes High. While nPORRST is low, the input buffers are disabled, and the output buffers are disabled with the default pulls enabled. All output-only signals have the output buffer disabled and the default pull enabled while nPORRST is low, and are configured as outputs with the pulls disabled immediately after nPORRST goes High. 4.3.1 PGE Package 4.3.1.1 Multibuffered Analog-to-Digital Converters (MibADC) Table 4-1. PGE Multibuffered Analog-to-Digital Converters (MibADC1, MibADC2) Terminal Signal Reset Pull Pull Type Description Type State Signal Name 144 PGE ADREFHI(1) 66 Power N/A None ADC high reference supply ADREFLO(1) 67 Power ADC low reference supply VCCAD(1) 69 Power Operating supply for ADC VSSAD(1) 68 Ground AD1EVT 86 I/O Pulldown Programmable, ADC1 event trigger input, 20 µA or GPIO MIBSPI3NCS[0]/AD2EVT/GIOB[2]/ 55 I/O Pullup Programmable, ADC2 event trigger input, EQEP1I/N2HET2_PIN_nDIS 20 µA or GPIO AD1IN[0] 60 Input N/A None ADC1 analog input AD1IN[1] 71 AD1IN[2] 73 AD1IN[3] 74 AD1IN[4] 76 AD1IN[5] 78 AD1IN[6] 80 AD1IN[7] 61 (1) The ADREFHI, ADREFLO, VCCAD and VSSAD connections are common for both ADC cores. 10 Terminal Configuration and Functions Copyright © 2012–2015, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: RM46L430 RM46L830 |
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