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54F374DM Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part No. 54F374DM
Description  Octal D-Type Flip-Flop with TRI-STATE Outputs
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Maker  NSC [National Semiconductor (TI)]
Homepage  http://www.national.com
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54F374DM Datasheet(HTML) 2 Page - National Semiconductor (TI)

   
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Unit LoadingFan Out
Pin
54F74F
Names
Description
UL
Input IIH IIL
HIGHLOW
Output IOH IOL
D0–D7 Data Inputs
1010
20 mA b06 mA
CP
Clock Pulse Input (Active Rising Edge)
1010
20 mA b06 mA
OE
TRI-STATE Output Enable Input (Active LOW)
1010
20 mA b06 mA
O0–O7 TRI-STATE Outputs
15040 (333)
b
3 mA24 mA (20 mA)
Functional Description
The ’F374 consists of eight edge-triggered flip-flops with in-
dividual D-type inputs and TRI-STATE true outputs The
buffered clock and buffered Output Enable are common to
all flip-flops The eight flip-flops will store the state of their
individual D inputs that meet the setup and hold time re-
quirements on the LOW-to-HIGH Clock (CP) transition With
the Output Enable (OE) LOW the contents of the eight flip-
flops are available at the outputs When the OE is HIGH the
outputs go to the high impedance state Operation of the
OE input does not affected the state of the flip-flops
Truth Table
Inputs
Internal
Output
Dn
CP
OE
Register
On
H
L
LH
H
L
L
LL
L
XX
H
X
Z
H e HIGH Voltage Level
L e LOW Voltage Level
X e Immaterial
Z e High Impedance
L e LOW-to-HIGH Clock Transition
Logic Diagram
TLF9524 – 5
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays
2


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