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SAB82525H Datasheet(PDF) 25 Page - Infineon Technologies AG |
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SAB82525H Datasheet(HTML) 25 Page - Infineon Technologies AG |
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25 / 126 page  Semiconductor Group 25 82525 82526 82525 82526 SAB SAB SAF SAF Characteristics: address recognition high byte Only the high byte of a 2-byte address field will be compared. The whole frame except the first address byte will be stored in RFIFO. RAL1 contains the second and RHCR the third byte following the opening flag. 2.3 Transparent Mode 1 (MODE: MDS1, MDS0, ADM = 101) Characteristics: no address recognition No address recognition is performed and each frame will be stored in the RFIFO. RAL1 contains the first and RHCR the second byte following the opening flag. 2.4 Transparent Mode 0 (MODE: MDS1, MDS0, ADM = 100) Characteristics: fully transparent In extended transparent modes, fully transparent data transmission/reception without HDLC framing is performed, i.e. without FLAG generation/recognition, CRC generation/check, bit- stuffing mechanism. This allows user specific protocol variations or the usage of Character Oriented Protocols (such as IBM BISYNC). Data transmission is always performed out of the XFIFO. In extended transparent mode 0 (ADM = 0), data reception is done via the RAL1 register, which always contains the actual data byte assembled at the RxD pin. In extended transparent mode 1 (ADM = 1), the receive data are additional shifted into the RFIFO. Also refer to chapter 6.1 and 6.2. 2.5 Extended Transparent Modes 0; 1 (MODE: MDS1, MDS0 = 11) |
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